Citations refer to the original publication, not to a Scieee localized version.
Núñez Martínez, J., Avedillo de Juan, M. J., & Quintana Toledo, J. M. (2011). Efficient realization of RTD-CMOS logic gates. https://doi.org/10.1145/1973009.1973090
Núñez Martínez, Juan, et al. Efficient realization of RTD-CMOS logic gates. 2011. https://doi.org/10.1145/1973009.1973090.
Núñez Martínez, Juan, María José Avedillo de Juan, and José María Quintana Toledo. Efficient realization of RTD-CMOS logic gates. 2011. https://doi.org/10.1145/1973009.1973090.
Núñez Martínez, J., Avedillo de Juan, M. J. and Quintana Toledo, J. M. (2011) Efficient realization of RTD-CMOS logic gates. Available at: https://doi.org/10.1145/1973009.1973090.
J. Núñez Martínez, M. J. Avedillo de Juan, and J. M. Quintana Toledo, “Efficient realization of RTD-CMOS logic gates,” 2011, doi: 10.1145/1973009.1973090.
@misc{nunezmartinez2011efficient,
author = {Núñez Martínez, Juan and Avedillo de Juan, María José and Quintana Toledo, José María},
title = {Efficient realization of RTD-CMOS logic gates},
year = {2011},
doi = {10.1145/1973009.1973090},
url = {https://doi.org/10.1145/1973009.1973090}
}
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