Citations refer to the original publication, not to a Scieee localized version.
Ríos Navarro, J. A., Gutiérrez Galán, D., Domínguez Morales, J. P., Piñero-Fuentes, E., Durán López, L., Tapiador Morales, R., & Domínguez Morales, M. J. (2021). Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC. MDPI. https://doi.org/10.3390/electronics10010094
Ríos Navarro, José Antonio, et al. Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC. MDPI, 2021. https://doi.org/10.3390/electronics10010094.
Ríos Navarro, José Antonio, Daniel Gutiérrez Galán, Juan Pedro Domínguez Morales, Enrique Piñero-Fuentes, Lourdes Durán López, Ricardo Tapiador Morales, and Manuel Jesús Domínguez Morales. Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC. MDPI, 2021. https://doi.org/10.3390/electronics10010094.
Ríos Navarro, J. A. et al. (2021) Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC. MDPI. Available at: https://doi.org/10.3390/electronics10010094.
J. A. Ríos Navarro et al., “Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC,” MDPI, 2021, doi: 10.3390/electronics10010094.
@misc{riosnavarro2021efficient,
author = {Ríos Navarro, José Antonio and Gutiérrez Galán, Daniel and Domínguez Morales, Juan Pedro and Piñero-Fuentes, Enrique and Durán López, Lourdes and Tapiador Morales, Ricardo and Domínguez Morales, Manuel Jesús},
title = {Efficient Memory Organization for DNN Hardware Accelerator Implementation on PSoC},
year = {2021},
publisher = {MDPI},
doi = {10.3390/electronics10010094},
url = {https://doi.org/10.3390/electronics10010094}
}
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