Citations refer to the original publication, not to a Scieee localized version.
Senhadji Navarro, R., García Vargas, I., & Guisado Lizar, J. L. (2012). Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs. IEEE Computer Society. https://doi.org/10.1109/ICECS.2012.6463760
Senhadji Navarro, Raouf, et al. Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs. IEEE Computer Society, 2012. https://doi.org/10.1109/ICECS.2012.6463760.
Senhadji Navarro, Raouf, Ignacio García Vargas, and José Luis Guisado Lizar. Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs. IEEE Computer Society, 2012. https://doi.org/10.1109/ICECS.2012.6463760.
Senhadji Navarro, R., García Vargas, I. and Guisado Lizar, J. L. (2012) Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs. IEEE Computer Society. Available at: https://doi.org/10.1109/ICECS.2012.6463760.
R. Senhadji Navarro, I. García Vargas, and J. L. Guisado Lizar, “Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs,” IEEE Computer Society, 2012, doi: 10.1109/ICECS.2012.6463760.
@misc{senhadjinavarro2012performance,
author = {Senhadji Navarro, Raouf and García Vargas, Ignacio and Guisado Lizar, José Luis},
title = {Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs},
year = {2012},
publisher = {IEEE Computer Society},
doi = {10.1109/ICECS.2012.6463760},
url = {https://doi.org/10.1109/ICECS.2012.6463760}
}
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