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2405-8963 © 2019, IFAC (In e na ional Fede a ion o Au oma ic Con ol) Hos ing by Else ie L d. All igh s ese ed.
Pee e iew unde esponsibili y o In e na ional Fede a ion o Au oma ic Con ol.
10.1016/j.i acol.2019.12.704
©
2019, IFAC (In e na ional Fede a ion o Au oma ic Con ol) Hos ing by Else ie L d. All igh s ese ed.
10.1016/j.i acol.2019.12.704 2405-8963
Design and simula ion o solu ions o educe he he mal esis ance o ligh ing
sys ems
I. Janako a*, P. Honec**, V. Tulis***
* Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: janako a@ eec. u b .cz)
** Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: honecp@ eec. u b .cz)
*** Facul y o Mechanical Enginee ing, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: 161879@ u b .cz)
Abs ac : The pape ocuses on some essen ial s eps in he de elopmen o high powe line ligh . The
esea ch wi hin he sol ed p ojec deals wi h he de elopmen o a special ex uded p o ile wi h a cooling
channel and wi h hea emo al by he ci cula ion o he coolan and on he design o a cooling sys em
wi h all he sa e y elemen s. The pa ial aim o he wo k is o de e mine he he mal esis ance o
indi idual pa s o he de ice and o design modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he limi s se by he e o o achie e maximum ligh ou pu , bu also
he longe i y, economy, sa e y, and eliabili y o ope a ion. The analy ical calcula ions, CFD simula ions,
and eal es ing we e used o de e mine he equi ed pa ame e s. The main esul p esen ed in his pape is
a no el de eloped PCB wi h a coppe co e and he mal ias.
Keywo ds: LED, line ligh sou ce, line scan came a, compu e ision, he mal esis ance, ligh ou pu ,
PCB, CFD simula ion
1. INTRODUCTION
Wi h he ad ancemen o ligh ou pu and unc ionali y o
ligh -emi ing diode, he ligh s o med by hese LEDs a e
inc easingly being used o illumina e in e io s, ex e io s, and
also pe o m a ious deco a i e and design unc ions. LEDs
also ha e g ea bene i s in compu e ision o hei
p ope ies. I is easy o c ea e ligh ing sys ems o a ious
shapes and pa ame e s. Today's e y common asks o
compu e ision include he con ol o he p oduc ion o
ma e ials (e.g. nonwo ens, oils, pape , e c.) p oduced in so-
called endless bel s. The key pa ame e is he CD (c oss
di ec ion) and MD (machine di ec ion) esolu ion o he scan
ma e ial, whe e he MD esolu ion is de e mined by he speed
o he ma e ial and he ame a e o he came a. Fo his
pu pose, a combina ion o a line scan came a and a line ligh
sou ce is mos commonly used. S a e-o -a high speed
came as in ended o his pu pose achie e speeds o up o
250,000 lps (lines pe second), so he exposu e ime is
some imes less han 3 µs. The e o e, he e is an inc easing
demands pu ed on hese ligh s, especially on luminous lux,
bu also hei o e all leng h, powe consump ion and o he
pa ame e s. Nowadays, high-powe LEDs capable o c ea ing
he line ligh sou ce wi h he equi ed in ensi y a e on he
ma ke . Bu e en inc easing diode e iciency is no enough,
and so much was e hea is gene a ed ha bo h he he mal
esis ance o he de ice and he cooling sys em need o be
add essed. Fo such ligh sou ces, passi e cooling me hods
a e no longe su icien and ac i e app oaches a e needed. I
is possible o use ans o ci cula e he ai and emo e hea ed
ai om he de ice away o he en i onmen . Bu wa e
cooling is an e en mo e e ec i e solu ion, so he esea ch
p ojec ocused on he de elopmen o a special ex uded
p o ile wi h a cooling channel and wi h hea emo al h ough
he ci cula ion o he coolan .
Howe e , esea ch also concen a ed on he o e all he mal
op imiza ion o he line ligh sou ce being de eloped. The
pa ial aim o he wo k was o de e mine he he mal
esis ance o indi idual pa s o he equipmen and o p opose
modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he equi ed limi s. Fi s ,
he PCB i sel was analyzed and modi ica ions we e made o
educe i s he mal esis ance. Subsequen ly, he
hyd odynamics o he channel and he hea ans e in i we e
assessed, especially wi h ega d o ensu ing he condi ions o
u bulen low. The o e all he mal esis ance o he p o ile
wi h he cooling channel was de e mined and he o al
he mal esis ance o he en i e de ice was hen es ablished.
On he basis o pe o med calcula ions and simula ions and
p oposed modi ica ions, a design o a powe ul cooling
de ice wi h he op imum inle empe a u e was subsequen ly
ca ied ou . Also, a hyd aulic calcula ion was made o all
impo an sys em componen s and egula ion was designed o
ensu e economical and eliable sys em ope a ion. The p esen
pape ocuses p ima ily on he pa o he esea ch conce ning
he de e mina ion o he he mal esis ance o he p in ed
ci cui and sugges ions o adjus men s ha could educe i .
Design and simula ion o solu ions o educe he he mal esis ance o ligh ing
sys ems
I. Janako a*, P. Honec**, V. Tulis***
* Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: janako a@ eec. u b .cz)
** Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: honecp@ eec. u b .cz)
*** Facul y o Mechanical Enginee ing, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: 161879@ u b .cz)
Abs ac : The pape ocuses on some essen ial s eps in he de elopmen o high powe line ligh . The
esea ch wi hin he sol ed p ojec deals wi h he de elopmen o a special ex uded p o ile wi h a cooling
channel and wi h hea emo al by he ci cula ion o he coolan and on he design o a cooling sys em
wi h all he sa e y elemen s. The pa ial aim o he wo k is o de e mine he he mal esis ance o
indi idual pa s o he de ice and o design modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he limi s se by he e o o achie e maximum ligh ou pu , bu also
he longe i y, economy, sa e y, and eliabili y o ope a ion. The analy ical calcula ions, CFD simula ions,
and eal es ing we e used o de e mine he equi ed pa ame e s. The main esul p esen ed in his pape is
a no el de eloped PCB wi h a coppe co e and he mal ias.
Keywo ds: LED, line ligh sou ce, line scan came a, compu e ision, he mal esis ance, ligh ou pu ,
PCB, CFD simula ion
1. INTRODUCTION
Wi h he ad ancemen o ligh ou pu and unc ionali y o
ligh -emi ing diode, he ligh s o med by hese LEDs a e
inc easingly being used o illumina e in e io s, ex e io s, and
also pe o m a ious deco a i e and design unc ions. LEDs
also ha e g ea bene i s in compu e ision o hei
p ope ies. I is easy o c ea e ligh ing sys ems o a ious
shapes and pa ame e s. Today's e y common asks o
compu e ision include he con ol o he p oduc ion o
ma e ials (e.g. nonwo ens, oils, pape , e c.) p oduced in so-
called endless bel s. The key pa ame e is he CD (c oss
di ec ion) and MD (machine di ec ion) esolu ion o he scan
ma e ial, whe e he MD esolu ion is de e mined by he speed
o he ma e ial and he ame a e o he came a. Fo his
pu pose, a combina ion o a line scan came a and a line ligh
sou ce is mos commonly used. S a e-o -a high speed
came as in ended o his pu pose achie e speeds o up o
250,000 lps (lines pe second), so he exposu e ime is
some imes less han 3 µs. The e o e, he e is an inc easing
demands pu ed on hese ligh s, especially on luminous lux,
bu also hei o e all leng h, powe consump ion and o he
pa ame e s. Nowadays, high-powe LEDs capable o c ea ing
he line ligh sou ce wi h he equi ed in ensi y a e on he
ma ke . Bu e en inc easing diode e iciency is no enough,
and so much was e hea is gene a ed ha bo h he he mal
esis ance o he de ice and he cooling sys em need o be
add essed. Fo such ligh sou ces, passi e cooling me hods
a e no longe su icien and ac i e app oaches a e needed. I
is possible o use ans o ci cula e he ai and emo e hea ed
ai om he de ice away o he en i onmen . Bu wa e
cooling is an e en mo e e ec i e solu ion, so he esea ch
p ojec ocused on he de elopmen o a special ex uded
p o ile wi h a cooling channel and wi h hea emo al h ough
he ci cula ion o he coolan .
Howe e , esea ch also concen a ed on he o e all he mal
op imiza ion o he line ligh sou ce being de eloped. The
pa ial aim o he wo k was o de e mine he he mal
esis ance o indi idual pa s o he equipmen and o p opose
modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he equi ed limi s. Fi s ,
he PCB i sel was analyzed and modi ica ions we e made o
educe i s he mal esis ance. Subsequen ly, he
hyd odynamics o he channel and he hea ans e in i we e
assessed, especially wi h ega d o ensu ing he condi ions o
u bulen low. The o e all he mal esis ance o he p o ile
wi h he cooling channel was de e mined and he o al
he mal esis ance o he en i e de ice was hen es ablished.
On he basis o pe o med calcula ions and simula ions and
p oposed modi ica ions, a design o a powe ul cooling
de ice wi h he op imum inle empe a u e was subsequen ly
ca ied ou . Also, a hyd aulic calcula ion was made o all
impo an sys em componen s and egula ion was designed o
ensu e economical and eliable sys em ope a ion. The p esen
pape ocuses p ima ily on he pa o he esea ch conce ning
he de e mina ion o he he mal esis ance o he p in ed
ci cui and sugges ions o adjus men s ha could educe i .
Design and simula ion o solu ions o educe he he mal esis ance o ligh ing
sys ems
I. Janako a*, P. Honec**, V. Tulis***
* Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: janako a@ eec. u b .cz)
** Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: honecp@ eec. u b .cz)
*** Facul y o Mechanical Enginee ing, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: 161879@ u b .cz)
Abs ac : The pape ocuses on some essen ial s eps in he de elopmen o high powe line ligh . The
esea ch wi hin he sol ed p ojec deals wi h he de elopmen o a special ex uded p o ile wi h a cooling
channel and wi h hea emo al by he ci cula ion o he coolan and on he design o a cooling sys em
wi h all he sa e y elemen s. The pa ial aim o he wo k is o de e mine he he mal esis ance o
indi idual pa s o he de ice and o design modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he limi s se by he e o o achie e maximum ligh ou pu , bu also
he longe i y, economy, sa e y, and eliabili y o ope a ion. The analy ical calcula ions, CFD simula ions,
and eal es ing we e used o de e mine he equi ed pa ame e s. The main esul p esen ed in his pape is
a no el de eloped PCB wi h a coppe co e and he mal ias.
Keywo ds: LED, line ligh sou ce, line scan came a, compu e ision, he mal esis ance, ligh ou pu ,
PCB, CFD simula ion
1. INTRODUCTION
Wi h he ad ancemen o ligh ou pu and unc ionali y o
ligh -emi ing diode, he ligh s o med by hese LEDs a e
inc easingly being used o illumina e in e io s, ex e io s, and
also pe o m a ious deco a i e and design unc ions. LEDs
also ha e g ea bene i s in compu e ision o hei
p ope ies. I is easy o c ea e ligh ing sys ems o a ious
shapes and pa ame e s. Today's e y common asks o
compu e ision include he con ol o he p oduc ion o
ma e ials (e.g. nonwo ens, oils, pape , e c.) p oduced in so-
called endless bel s. The key pa ame e is he CD (c oss
di ec ion) and MD (machine di ec ion) esolu ion o he scan
ma e ial, whe e he MD esolu ion is de e mined by he speed
o he ma e ial and he ame a e o he came a. Fo his
pu pose, a combina ion o a line scan came a and a line ligh
sou ce is mos commonly used. S a e-o -a high speed
came as in ended o his pu pose achie e speeds o up o
250,000 lps (lines pe second), so he exposu e ime is
some imes less han 3 µs. The e o e, he e is an inc easing
demands pu ed on hese ligh s, especially on luminous lux,
bu also hei o e all leng h, powe consump ion and o he
pa ame e s. Nowadays, high-powe LEDs capable o c ea ing
he line ligh sou ce wi h he equi ed in ensi y a e on he
ma ke . Bu e en inc easing diode e iciency is no enough,
and so much was e hea is gene a ed ha bo h he he mal
esis ance o he de ice and he cooling sys em need o be
add essed. Fo such ligh sou ces, passi e cooling me hods
a e no longe su icien and ac i e app oaches a e needed. I
is possible o use ans o ci cula e he ai and emo e hea ed
ai om he de ice away o he en i onmen . Bu wa e
cooling is an e en mo e e ec i e solu ion, so he esea ch
p ojec ocused on he de elopmen o a special ex uded
p o ile wi h a cooling channel and wi h hea emo al h ough
he ci cula ion o he coolan .
Howe e , esea ch also concen a ed on he o e all he mal
op imiza ion o he line ligh sou ce being de eloped. The
pa ial aim o he wo k was o de e mine he he mal
esis ance o indi idual pa s o he equipmen and o p opose
modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he equi ed limi s. Fi s ,
he PCB i sel was analyzed and modi ica ions we e made o
educe i s he mal esis ance. Subsequen ly, he
hyd odynamics o he channel and he hea ans e in i we e
assessed, especially wi h ega d o ensu ing he condi ions o
u bulen low. The o e all he mal esis ance o he p o ile
wi h he cooling channel was de e mined and he o al
he mal esis ance o he en i e de ice was hen es ablished.
On he basis o pe o med calcula ions and simula ions and
p oposed modi ica ions, a design o a powe ul cooling
de ice wi h he op imum inle empe a u e was subsequen ly
ca ied ou . Also, a hyd aulic calcula ion was made o all
impo an sys em componen s and egula ion was designed o
ensu e economical and eliable sys em ope a ion. The p esen
pape ocuses p ima ily on he pa o he esea ch conce ning
he de e mina ion o he he mal esis ance o he p in ed
ci cui and sugges ions o adjus men s ha could educe i .
Design and simula ion o solu ions o educe he he mal esis ance o ligh ing
sys ems
I. Janako a*, P. Honec**, V. Tulis***
* Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: janako a@ eec. u b .cz)
** Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: honecp@ eec. u b .cz)
*** Facul y o Mechanical Enginee ing, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: 161879@ u b .cz)
Abs ac : The pape ocuses on some essen ial s eps in he de elopmen o high powe line ligh . The
esea ch wi hin he sol ed p ojec deals wi h he de elopmen o a special ex uded p o ile wi h a cooling
channel and wi h hea emo al by he ci cula ion o he coolan and on he design o a cooling sys em
wi h all he sa e y elemen s. The pa ial aim o he wo k is o de e mine he he mal esis ance o
indi idual pa s o he de ice and o design modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he limi s se by he e o o achie e maximum ligh ou pu , bu also
he longe i y, economy, sa e y, and eliabili y o ope a ion. The analy ical calcula ions, CFD simula ions,
and eal es ing we e used o de e mine he equi ed pa ame e s. The main esul p esen ed in his pape is
a no el de eloped PCB wi h a coppe co e and he mal ias.
Keywo ds: LED, line ligh sou ce, line scan came a, compu e ision, he mal esis ance, ligh ou pu ,
PCB, CFD simula ion
1. INTRODUCTION
Wi h he ad ancemen o ligh ou pu and unc ionali y o
ligh -emi ing diode, he ligh s o med by hese LEDs a e
inc easingly being used o illumina e in e io s, ex e io s, and
also pe o m a ious deco a i e and design unc ions. LEDs
also ha e g ea bene i s in compu e ision o hei
p ope ies. I is easy o c ea e ligh ing sys ems o a ious
shapes and pa ame e s. Today's e y common asks o
compu e ision include he con ol o he p oduc ion o
ma e ials (e.g. nonwo ens, oils, pape , e c.) p oduced in so-
called endless bel s. The key pa ame e is he CD (c oss
di ec ion) and MD (machine di ec ion) esolu ion o he scan
ma e ial, whe e he MD esolu ion is de e mined by he speed
o he ma e ial and he ame a e o he came a. Fo his
pu pose, a combina ion o a line scan came a and a line ligh
sou ce is mos commonly used. S a e-o -a high speed
came as in ended o his pu pose achie e speeds o up o
250,000 lps (lines pe second), so he exposu e ime is
some imes less han 3 µs. The e o e, he e is an inc easing
demands pu ed on hese ligh s, especially on luminous lux,
bu also hei o e all leng h, powe consump ion and o he
pa ame e s. Nowadays, high-powe LEDs capable o c ea ing
he line ligh sou ce wi h he equi ed in ensi y a e on he
ma ke . Bu e en inc easing diode e iciency is no enough,
and so much was e hea is gene a ed ha bo h he he mal
esis ance o he de ice and he cooling sys em need o be
add essed. Fo such ligh sou ces, passi e cooling me hods
a e no longe su icien and ac i e app oaches a e needed. I
is possible o use ans o ci cula e he ai and emo e hea ed
ai om he de ice away o he en i onmen . Bu wa e
cooling is an e en mo e e ec i e solu ion, so he esea ch
p ojec ocused on he de elopmen o a special ex uded
p o ile wi h a cooling channel and wi h hea emo al h ough
he ci cula ion o he coolan .
Howe e , esea ch also concen a ed on he o e all he mal
op imiza ion o he line ligh sou ce being de eloped. The
pa ial aim o he wo k was o de e mine he he mal
esis ance o indi idual pa s o he equipmen and o p opose
modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he equi ed limi s. Fi s ,
he PCB i sel was analyzed and modi ica ions we e made o
educe i s he mal esis ance. Subsequen ly, he
hyd odynamics o he channel and he hea ans e in i we e
assessed, especially wi h ega d o ensu ing he condi ions o
u bulen low. The o e all he mal esis ance o he p o ile
wi h he cooling channel was de e mined and he o al
he mal esis ance o he en i e de ice was hen es ablished.
On he basis o pe o med calcula ions and simula ions and
p oposed modi ica ions, a design o a powe ul cooling
de ice wi h he op imum inle empe a u e was subsequen ly
ca ied ou . Also, a hyd aulic calcula ion was made o all
impo an sys em componen s and egula ion was designed o
ensu e economical and eliable sys em ope a ion. The p esen
pape ocuses p ima ily on he pa o he esea ch conce ning
he de e mina ion o he he mal esis ance o he p in ed
ci cui and sugges ions o adjus men s ha could educe i .
Design and simula ion o solu ions o educe he he mal esis ance o ligh ing
sys ems
I. Janako a*, P. Honec**, V. Tulis***
* Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: janako a@ eec. u b .cz)
** Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: honecp@ eec. u b .cz)
*** Facul y o Mechanical Enginee ing, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: 161879@ u b .cz)
Abs ac : The pape ocuses on some essen ial s eps in he de elopmen o high powe line ligh . The
esea ch wi hin he sol ed p ojec deals wi h he de elopmen o a special ex uded p o ile wi h a cooling
channel and wi h hea emo al by he ci cula ion o he coolan and on he design o a cooling sys em
wi h all he sa e y elemen s. The pa ial aim o he wo k is o de e mine he he mal esis ance o
indi idual pa s o he de ice and o design modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he limi s se by he e o o achie e maximum ligh ou pu , bu also
he longe i y, economy, sa e y, and eliabili y o ope a ion. The analy ical calcula ions, CFD simula ions,
and eal es ing we e used o de e mine he equi ed pa ame e s. The main esul p esen ed in his pape is
a no el de eloped PCB wi h a coppe co e and he mal ias.
Keywo ds: LED, line ligh sou ce, line scan came a, compu e ision, he mal esis ance, ligh ou pu ,
PCB, CFD simula ion
1. INTRODUCTION
Wi h he ad ancemen o ligh ou pu and unc ionali y o
ligh -emi ing diode, he ligh s o med by hese LEDs a e
inc easingly being used o illumina e in e io s, ex e io s, and
also pe o m a ious deco a i e and design unc ions. LEDs
also ha e g ea bene i s in compu e ision o hei
p ope ies. I is easy o c ea e ligh ing sys ems o a ious
shapes and pa ame e s. Today's e y common asks o
compu e ision include he con ol o he p oduc ion o
ma e ials (e.g. nonwo ens, oils, pape , e c.) p oduced in so-
called endless bel s. The key pa ame e is he CD (c oss
di ec ion) and MD (machine di ec ion) esolu ion o he scan
ma e ial, whe e he MD esolu ion is de e mined by he speed
o he ma e ial and he ame a e o he came a. Fo his
pu pose, a combina ion o a line scan came a and a line ligh
sou ce is mos commonly used. S a e-o -a high speed
came as in ended o his pu pose achie e speeds o up o
250,000 lps (lines pe second), so he exposu e ime is
some imes less han 3 µs. The e o e, he e is an inc easing
demands pu ed on hese ligh s, especially on luminous lux,
bu also hei o e all leng h, powe consump ion and o he
pa ame e s. Nowadays, high-powe LEDs capable o c ea ing
he line ligh sou ce wi h he equi ed in ensi y a e on he
ma ke . Bu e en inc easing diode e iciency is no enough,
and so much was e hea is gene a ed ha bo h he he mal
esis ance o he de ice and he cooling sys em need o be
add essed. Fo such ligh sou ces, passi e cooling me hods
a e no longe su icien and ac i e app oaches a e needed. I
is possible o use ans o ci cula e he ai and emo e hea ed
ai om he de ice away o he en i onmen . Bu wa e
cooling is an e en mo e e ec i e solu ion, so he esea ch
p ojec ocused on he de elopmen o a special ex uded
p o ile wi h a cooling channel and wi h hea emo al h ough
he ci cula ion o he coolan .
Howe e , esea ch also concen a ed on he o e all he mal
op imiza ion o he line ligh sou ce being de eloped. The
pa ial aim o he wo k was o de e mine he he mal
esis ance o indi idual pa s o he equipmen and o p opose
modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he equi ed limi s. Fi s ,
he PCB i sel was analyzed and modi ica ions we e made o
educe i s he mal esis ance. Subsequen ly, he
hyd odynamics o he channel and he hea ans e in i we e
assessed, especially wi h ega d o ensu ing he condi ions o
u bulen low. The o e all he mal esis ance o he p o ile
wi h he cooling channel was de e mined and he o al
he mal esis ance o he en i e de ice was hen es ablished.
On he basis o pe o med calcula ions and simula ions and
p oposed modi ica ions, a design o a powe ul cooling
de ice wi h he op imum inle empe a u e was subsequen ly
ca ied ou . Also, a hyd aulic calcula ion was made o all
impo an sys em componen s and egula ion was designed o
ensu e economical and eliable sys em ope a ion. The p esen
pape ocuses p ima ily on he pa o he esea ch conce ning
he de e mina ion o he he mal esis ance o he p in ed
ci cui and sugges ions o adjus men s ha could educe i .
Design and simula ion o solu ions o educe he he mal esis ance o ligh ing
sys ems
I. Janako a*, P. Honec**, V. Tulis***
* Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: janako a@ eec. u b .cz)
** Depa men o Con ol and Ins umen a ion, Facul y o Elec ical
Enginee ing and Communica ion, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: honecp@ eec. u b .cz)
*** Facul y o Mechanical Enginee ing, B no Uni e si y o Technology,
B no, Czech Republic (e-mail: 161879@ u b .cz)
Abs ac : The pape ocuses on some essen ial s eps in he de elopmen o high powe line ligh . The
esea ch wi hin he sol ed p ojec deals wi h he de elopmen o a special ex uded p o ile wi h a cooling
channel and wi h hea emo al by he ci cula ion o he coolan and on he design o a cooling sys em
wi h all he sa e y elemen s. The pa ial aim o he wo k is o de e mine he he mal esis ance o
indi idual pa s o he de ice and o design modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he limi s se by he e o o achie e maximum ligh ou pu , bu also
he longe i y, economy, sa e y, and eliabili y o ope a ion. The analy ical calcula ions, CFD simula ions,
and eal es ing we e used o de e mine he equi ed pa ame e s. The main esul p esen ed in his pape is
a no el de eloped PCB wi h a coppe co e and he mal ias.
Keywo ds: LED, line ligh sou ce, line scan came a, compu e ision, he mal esis ance, ligh ou pu ,
PCB, CFD simula ion
1. INTRODUCTION
Wi h he ad ancemen o ligh ou pu and unc ionali y o
ligh -emi ing diode, he ligh s o med by hese LEDs a e
inc easingly being used o illumina e in e io s, ex e io s, and
also pe o m a ious deco a i e and design unc ions. LEDs
also ha e g ea bene i s in compu e ision o hei
p ope ies. I is easy o c ea e ligh ing sys ems o a ious
shapes and pa ame e s. Today's e y common asks o
compu e ision include he con ol o he p oduc ion o
ma e ials (e.g. nonwo ens, oils, pape , e c.) p oduced in so-
called endless bel s. The key pa ame e is he CD (c oss
di ec ion) and MD (machine di ec ion) esolu ion o he scan
ma e ial, whe e he MD esolu ion is de e mined by he speed
o he ma e ial and he ame a e o he came a. Fo his
pu pose, a combina ion o a line scan came a and a line ligh
sou ce is mos commonly used. S a e-o -a high speed
came as in ended o his pu pose achie e speeds o up o
250,000 lps (lines pe second), so he exposu e ime is
some imes less han 3 µs. The e o e, he e is an inc easing
demands pu ed on hese ligh s, especially on luminous lux,
bu also hei o e all leng h, powe consump ion and o he
pa ame e s. Nowadays, high-powe LEDs capable o c ea ing
he line ligh sou ce wi h he equi ed in ensi y a e on he
ma ke . Bu e en inc easing diode e iciency is no enough,
and so much was e hea is gene a ed ha bo h he he mal
esis ance o he de ice and he cooling sys em need o be
add essed. Fo such ligh sou ces, passi e cooling me hods
a e no longe su icien and ac i e app oaches a e needed. I
is possible o use ans o ci cula e he ai and emo e hea ed
ai om he de ice away o he en i onmen . Bu wa e
cooling is an e en mo e e ec i e solu ion, so he esea ch
p ojec ocused on he de elopmen o a special ex uded
p o ile wi h a cooling channel and wi h hea emo al h ough
he ci cula ion o he coolan .
Howe e , esea ch also concen a ed on he o e all he mal
op imiza ion o he line ligh sou ce being de eloped. The
pa ial aim o he wo k was o de e mine he he mal
esis ance o indi idual pa s o he equipmen and o p opose
modi ica ions so ha he o al he mal esis ance and
maximum empe a u e a e wi hin he equi ed limi s. Fi s ,
he PCB i sel was analyzed and modi ica ions we e made o
educe i s he mal esis ance. Subsequen ly, he
hyd odynamics o he channel and he hea ans e in i we e
assessed, especially wi h ega d o ensu ing he condi ions o
u bulen low. The o e all he mal esis ance o he p o ile
wi h he cooling channel was de e mined and he o al
he mal esis ance o he en i e de ice was hen es ablished.
On he basis o pe o med calcula ions and simula ions and
p oposed modi ica ions, a design o a powe ul cooling
de ice wi h he op imum inle empe a u e was subsequen ly
ca ied ou . Also, a hyd aulic calcula ion was made o all
impo an sys em componen s and egula ion was designed o
ensu e economical and eliable sys em ope a ion. The p esen
pape ocuses p ima ily on he pa o he esea ch conce ning
he de e mina ion o he he mal esis ance o he p in ed
ci cui and sugges ions o adjus men s ha could educe i .
I. Janako a e al. / IFAC Pape sOnLine 52-27 (2019) 446–452 447
2. LINE LIGHT SOURCE WITH WATER COOLING
2.1 Indi idual pa s
In he de elopmen o he ligh wi h an e o o maximize he
ligh ou pu , i is necessa y o pay a en ion o all de ails o i s
indi idual pa s. The en i e line ligh sys em consis s o ou
main pa s:
- he diode i sel ,
- PCB ca ying a la ge numbe o diodes,
- suppo ing p o ile wi h op ical pa , p in ed ci cui and
cooling channel,
- cooling sys em wi h pump and wa e -ai coole .
Diode: Fo i s pe o mance, he XLamp XP-L High Densi y
LED diode om CREE (C ee® XLamp® XP-L LEDs, n.d.)
was selec ed o p o ide he ligh ou pu . A he momen , i is
p obably one o he mos powe ul comme cially a ailable
diode on he ma ke wi h huge ligh (bu also he mal)
pe o mance. I s basic pa ame e s a e: powe 10 W,
maximum cu en 3 A, maximum luminous lux 1150 lm,
he mal esis ance 2.2 °C/W.
P in ed ci cui boa d: PCB a e used o mechanical
a achmen and elec ical connec ion o componen s. The e
a e di e en ypes o shee ma e ials wi h di e en p ope ies
on he ma ke . The analysis o he PCB p o o ype using
calcula ions and CFD simula ions and sugges ions o
imp o emen a e desc ibed in he ollowing chap e s.
P o ile: The skele on o he en i e line ligh sou ce is an
ex uded p o ile (Fig. 1). I s unc ion is p ima ily ca ying
and cooling. A i s op, op ical elemen s a e ixed o
maximize he concen a ion o ligh in he desi ed a ea.
Below a e p in ed ci cui boa ds wi h diodes. The channel
h ough which he e ige an lows is loca ed a he bo om.
Fig. 1. Simpli ied side iew o p o ile
Cooling sys em: An ea lie design o he en i e cooling
sys em wi h an inle empe a u e o 50 °C was conside ed o
PCB analysis. Howe e , he p ojec p oposed a new sys em
wi h he coolan inle empe a u e o 30 °C. The comple e
cooling sys em consis s o a ci cula ion pump, coole s, sa e y
al es, expansion and s o age ank, he mos a ic mixing
al e and cooling channel i sel . The cooling channel is
placed in an aluminum p o ile, and he e he hea om he
sys em is emo ed. An impo an pa ame e is he sa e
c ossing o he bounda y be ween he lamina and u bulen
beha io o he coolan . I is a classic case o o ced in e nal
con ec ion wi h cons an hea low. To sa e ope a ing cos s,
he sys em was di ided in o ope a ion in win e and summe ,
when he design o coole s ha cool he liquid o he desi ed
le el di e s.
2.2 Sys em equi emen s
When designing a high powe ligh sou ce, i is impo an o
conside mainly wo pa ame e s. Fi s ly, i is he maximum
empe a u e o he diode ha is impo an o i s p ope
ope a ion and which should no be exceeded du ing
ope a ion, o he wise he equi ed luminous in ensi y,
e iciency and diode li e would dec ease. The second
impo an moni o ed pa ame e is he o al he mal esis ance
o he de ice, which gi es an idea o he empe a u es on he
indi idual componen s o he sys em and he equi emen s o
he coolan wi h which he sys em can s ill be ope a ed
wi hou any nega i e e ec s on i s unc ionali y.
The ligh ou pu o each diode is dependen on i s
empe a u e. The maximum empe a u e ha XLamp XP-L is
capable o wi hs anding is 150 °C (c i ical junc ion
empe a u e, JT). Howe e , a his empe a u e i does no
each i s maximum ligh ou pu . Based on he ela i e
luminous lux dependence on he junc ion empe a u e gi en
by he manu ac u e (C ee® XLamp® XP-L LEDs, n.d.) and
as a comp omise be ween he maximum luminance and he
eal empe a u e ha can be achie ed by he diodes unde
such condi ions, he maximum diode empe a u e
equi emen o he p oposed ligh sou ce was se o 120 °C.
Knowing he he mal esis ance o he sys em is c ucial o
he co ec de e mina ion o he maximum cooling
empe a u e a whi ch he diodes a e s ill unning a ull
powe . The smalle he he mal esis ance he sys em is
designed o , he less equi emen s can be placed on he
coolan . Thus, by op imizing he he mal esis ance co ec ly,
he ene gy equi ed o cool he coolan can be sa ed and he
cos o he comple e cooling sys em can be educed oo. The
equi ed maximum he mal esis ance o he sys em 10 K/W
was de e mined based on he maximum cu en e sus
ambien empe a u e indica ed by he manu ac u e (C ee®
XLamp® XP-L LEDs, n.d.) and he liquid inle empe a u e
ha he cu en cooling sys em is capable o achie ing a
leas a o able ambien empe a u e.
3. SINGLE-DIODE PCBS
P in ed ci cui boa ds a e dis inguished p ima ily by he
ma e ial used o make hei co e - he PCB wi h he lamina e
o me al co e. When using high-powe ligh emi ing diodes,
a la ge amoun o was e hea is gene a ed and he PCB has o
mee high demands on he o e all hea conduc ion esis ance.
This chap e ocuses on calcula ing hese ac o s. The
ollowing chap e s hen deal wi h sugges ions o imp o ing
he design solu ion and CFD simula ions o he indi idual
p in ed ci cui ypes o de e mine he mos sui able.
448 I. Janako a e al. / IFAC Pape sOnLine 52-27 (2019) 446–452
3.1 Basic ypes o p in ed ci cui boa ds
The mos used and cheapes ypes o PCB a e hose whose
cons uc ion consis s o a lamina e boa d (FR4 - cup ex i ), a
hin laye o coppe and a laye o solde . In Fig. 2 is a c oss-
sec ional iew o he PCB. The bo om laye which is o med
by a hea -conduc ing pas e, will be placed on an aluminum
p o ile. The diode will be solde ed o he uppe solde laye .
The ma e ials and p ope ies o he indi idual laye s a e in
he ollowing able.
Fig. 2. C oss-sec ion o lamina ed PCB
Table 1. Lamina e PCB ma e ials
Ma e ial Thickness
(mm)
The mal conduc i i y
(W
⋅
m
-1
⋅
K
-1
)
SnAgCu solde 0.100 58
Coppe 0.035 398
Lamina e co e 1.600 0.2
Hea conduc ing pas e
0.100 8.5
Wi h inc easing diode pe o mance, i was necessa y o
eplace he insula ing lamina e wi h ma e ials wi h be e
he mal p ope ies. Two seemed app op ia e - aluminum and
coppe . The unc ion o elec ical insula ion was aken o e
by a hin dielec ic laye . The sec ion o he aluminum co e
join is shown in Fig. 3. The p ope ies o he ma e ials o he
indi idual laye s a e shown again in he able (Table 2).
Fig. 3. C oss-sec ion o aluminum PCB
Table 2. Aluminum PCB ma e ials
Ma e ial Thickness
(mm)
The mal conduc i i y
(W
⋅
m
-1
⋅
K
-1
)
SnAgCu solde 0.075 58
Coppe 0.035 398
Dielec ic 0.076 2.4
Aluminum co e 1.600 150
Hea conduc ing pas e
0.100 8.5
An e en be e PCB, wi h be e he mal p ope ies han
aluminum, is o med by eplacing he aluminum co e (in
Fig. 3 and Table 2) wi h a coppe co e ( hickness 1.6 mm and
he mal conduc i i y 398 W⋅m
-1
⋅K
-1
). O he laye s and hei
p ope ies emain he same.
3.2 The mal low h ough anode and ca hode
Because bo h calcula ions and simula ions need o know how
he hea gene a ed on he chip hea s he a ea benea h i , a es
was pe o med o moni o he unde side o he diode while
g adually hea ing i . An in a ed came a was used o his
pu pose. The aim was o ind ou he empe a u e dis ibu ion
on he indi idual pa s o he diode.
Fig. 4. In a ed came a image - empe a u e dis ibu ion a he
bo om o CREE X-lamp XP-L
I was ound ou om he es ha he whole unde side o he
diode is hea ed by he chip in he middle app oxima ely
equally o e he en i e c oss sec ion. Thus, i can be assumed
ha he hea lows h ough he anode, ca hode and cen e will
depend only on he size o hei su aces. Thus, he pe cen
low dis ibu ion by indi idual diode po ions is 22% bo h by
anode and ca hode and 56% by cen e ed.
3.3 Calcula ion o PCB he mal esis ance
Fo op imum unc ion and selec ion o sui able join s
(ma e ials and dis ibu ion o indi idual laye s) i is necessa y
o know i s abili y o dissipa e he hea gene a ed on he diode
chip in o he aluminum p o ile and cooling channel. Hea
conduc ion h ough a wall is gi en by Fou ie 's low, whe e q
is he hea low (W/m
2
), λ is he he mal conduc i i y
(W/(m⋅K)),
h
is he hickness (m) and ∆T is he empe a u e
di e ence (K) (Lampinen, Assad and Cu d, 2001).
h
T
q
∆
=
λ
&
(1)
The abili y o he ma e ial laye o conduc hea depends on
i s he mal conduc i i y, c oss-sec ional a ea and hickness.
This p ope y can also be cha ac e ized by he he mal
esis ance o he ma e ial, and a e he p e ious equa ion has
been edi ed, a ela ion (2) is c ea ed (
R
is he he mal
esis ance (K/W),
S
is he a ea (m
2
)).
S
R
h
⋅
=
λ
(2)
I. Janako a e al. / IFAC Pape sOnLine 52-27 (2019) 446–452 449
The ma e ial p ope ies equi ed o calcula e he o al he mal
esis ance o single-diode PCB acco ding o equa ion (2) a e
shown in he p e ious ables. The equi ed dimensions a e
de i ed om he ecommended dimensions o he XLamp
XP-L solde pla e and a e shown in Fig. 5. (C ee® XLamp®
XP-L LEDs, n.d.).
Fig. 5. Al e na i e bo om iews o he XP-L High Densi y
LED (C ee® XLamp® XP-L LEDs, n.d.)
By eplacing he indi idual laye s o he join wi h pa ial
esis o s, a esis i i y scheme shown in Fig. 6 is p oduced.
The + sign ep esen s he anode, - he ca hode, and C he
cen e . Due o he analogy be ween he hea low and he
elec ic cu en , he same ules can be used o composing he
he mal esis ances as o composing he elec ical ones,
se ial and pa allel connec ions.
Fig. 6. Resis ance scheme o aluminum p in ed ci cui boa d
3.4 Resul ing o al he mal esis ance o he PCB
Lamina e PCB: In his ype o join , he lamina e he mally
non-conduc i e co e has a decisi e in luence on he o e all
he mal esis ance. I s esis ance is so g ea (R = 734 K/W)
ha i will no be conside ed u he .
Aluminum PCB: The he mal esis ances o he indi idual
pa s and laye s o he join wi h he aluminum co e and he
p ocedu e o calcula ing he o al he mal esis ance a e
shown in Table 3, whe e R
p
is he he mal esis ance o he
pa allel po ion o he esis o scheme in Fig. 6 and R is he
o al he mal esis ance o he p in ed ci cui .
Table 3. The mal esis ance o indi idual pa s o
aluminum PCB
Pa
SnAg
Cu
Cu R
p
Diele
c ic
Al
co e
Pas
e
R
(K/W)
+ 1.04
0.05
0.24 4.17 0.98 1.08 6.47
C 0.40
0.02
- 1.04
0.05
Coppe PCB: When eplacing he aluminum co e wi h he
coppe co e, he o e all he mal esis ance o he join is
educed. In Table 3, he co e esis ance dec eases om 0.98
(Al) o 0.37 (Cu) and hus he o al he mal esis ance
dec eases om 6.47 o 5.86 K/W.
As is clea om he p e ious ex , he use o he coppe co e
PCB would be mos app op ia e o he o e all he mal
esis ance o he join . To op imize he en i e sys em
consis ing o diodes, PCB, aluminum p o ile and cooling
channel so ha he o al he mal esis ance is less han he
equi ed 10 K/W, when he boa d i sel has he he mal
esis ance o a ound 6 K/W and he LED has he esis ance o
2.2 K/W, he e a e no many op ions le o he he mal
esis ance o he aluminum p o ile and he cooling channel.
On he basis o hese ac s, i was decided o c ea e a s udy
dealing wi h he possibili ies o educing he he mal
esis ance o he PCB in o de o design he mos sui able
p in ed ci cui (ma e ial, cons uc ion) o he line ligh
sou ce.
4. SUGGESTIONS FOR MODIFYING THE DESIGN
SOLUTION TO REDUCE PCB THERMAL RESISTANCE
I is e iden ( om Table 3) ha he dielec ic laye has a
majo in luence on he o e all he mal esis ance. I he o al
hea esis ance is o be educed, i is necessa y o pay he
mos a en ion o his laye . Ano he op ion is o modi y he
me al co e.
4.1 Change he hickness o he me al co e
The s anda d hickness o he me al PCBs is 1.6 mm. Some
manu ac u e s o e he possibili y o educe his pa ame e
and he eby educe he he mal esis ance o he me al laye .
As can be seen om (2), he he mal esis ance is di ec ly
p opo ional o he ma e ial hickness. By educing he
hickness o hal , we also educe he esis ance by hal , o
example, o an aluminum co e, he o al esis ance is educed
om 6.47 o 5.98 K/W.
4.2 C ea ing a he mal ias
A way o imp o e he hea ans e o he PCB is o add
he mal ias - pla ed h ough-holes (PTH) be ween he
conduc i e laye s as shown in Fig. 7 (Op imizing PCB
The mal Pe o mance o C ee® XLamp® LEDs, n.d.). The
ias a e c ea ed by d illing holes and and coppe pla ing hem
o illing hem wi h hea conduc ing ma e ial. This will esul
in he mal ansi ions o ma ion and he o e all esis ance o
450 I. Janako a e al. / IFAC Pape sOnLine 52-27 (2019) 446–452
he dielec ic laye will dec ease. The echnology and
ma e ials o d illing and illing holes can be di e en .
Fig. 7. C oss-sec ion geome y wi h he mal ias (no o
scale) (C ee® XLamp® XP-L LEDs, n.d.)
When designing his solu ion, a en ion should be paid o he
accomplishmen echnology, as di e en me als ha e
di e en he mal expansion and no all me als should be
combined. Fo example, a combina ion o aluminum and
coppe is no ecommended because o he high co osion
e ec , while a combina ion o coppe and in is e y sui able.
A CFD simula ion o empe a u e dis ibu ion o his design
is gi en in he ollowing chap e .
4.3 C ea ing a he mal b idge
An e en mo e e ec i e solu ion is o e ed by he Ame ican
manu ac u e Co an USA (COFAN USA, 2019), whe e he
dielec ic laye unde he middle o he solde pad is
comple ely emo ed and eplaced by he so-called he mal
b idge (see Fig. 8). This he mal b idge will cause he
empe a u e di e ence be ween he hea ans e pas e and
he solde laye o all o a minimum, esul ing in a PCB wi h
he lowes he mal esis ance on he ma ke .
Fig. 8. Supe Pilla MCPCB (COFAN USA, 2019)
5. CFD SIMULATION OF SINGLE DIODE PCBS
Based on he dimensions and ea u es lis ed abo e, a single
diode model was c ea ed in Au odesk In en o in h ee
a ia ions:
- PCB wi h aluminum co e,
- PCB wi h coppe co e and he mal ias,
- PCB wi h coppe co e and he mal b idge.
A ne wo k wi h a co esponding base cell size was se o each
model pa . The solid-s a e physics o hea ans e
calcula ion in p og amme STAR-CCM+ is gi en by
compu a ional models and ma e ial p ope ies, in pa icula
he mal conduc i i y λ, o he subs ance. I is he e o e
necessa y o c ea e a physical model o each ma e ial wi h
he ollowing pa ame e s: S eady, Seg ega ed low, Cons an
densi y and Solid. The men ioned ma e ial p ope ies a e
p esc ibed by he pa ame e "Solid". The bounda y
condi ions mus also be de e mined.
Fig. 9. Compu a ional ne wo k o p in ed ci cui model wi h
he mal ias
A e all h ee single diode PCB simula ions we e c ea ed, he
a e age empe a u e o he uppe and lowe side o he join
( in and hea conduc ing pas e) was e alua ed. Wi h a known
di e ence in empe a u e and hea low, he he mal
esis ance acco ding o o mula (3) can be de e mined. The
esul s o all a ian s a e shown in he ollowing able.
q
T
R&
∆
=
(3)
Table 4. Resul s o h ee a ian s o single-diode PCB
PCB ype
A g. empe a u e (K)
Δ
T
(K)
R
(K/W)
Top Bo om
Al co e 325.8 280.0 45.8 6.1
Cu co e wi h
he mal ias 318.1 286.2 31.9 4.3
Cu co e wi h
he mal b idge 312.7 288.9 23.8 3.2
As can be seen by compa ing Tables 3 and 4, he di e ence
be ween he analy ical calcula ion o he he mal esis ance o
he aluminum PCB and i s de i a ion om he a e age wall
empe a u es om he simula ion is app oxima ely 6%. The
esul ing de ia ion is caused by he ac ha he ela ionships
o he one-dimensional hea conduc ion we e applied o he
analy ical calcula ion. Howe e , as can be seen om he
ollowing igu e, he hea -a ec ed egion is sligh ly la ge
han he dielec ic-coppe con ac a ea. The e o e, he
ela ionships o 1D hea conduc ion cease o apply, since he
hea lux also p opaga es in he ans e se di ec ion o he
ma e ial.
Fig. 10. De ail o empe a u e dis ibu ion o dielec ic laye
o aluminum join

I. Janako a e al. / IFAC Pape sOnLine 52-27 (2019) 446–452 451
In his case, he book VDI Hea A las (VDI, 2010) alks abou
2D hea conduc ion and in oduces he no ion o shape ac o
k
, which ex ends he known equa ions 1D hea conduc ion by
he coe icien o hea p opaga ion in he c oss di ec ion. I
ep esen s he a io be ween he a ea eally a ec ed by hea
S2
and he con ac a ea o he walls
S1
. On he basis o
measu ing he dimensions o he a ec ed a ea
S2
(
S2
= 8.32 mm
2
) om he simula ion and de e mining he a ea
S1
(
S1
= 7.59 mm
2
) om he solde pad dimensions (see
Fig. 5), he ac o
k
= 1.1 was calcula ed. As a esul , he
dielec ic laye esis ance changes o 3.8 K/W, and he o al
esis ance o he aluminum boa d changes o 6.1 K/W.
Conside ing 2D conduc ing and shape ac o , he analy ical
calcula ion o he he mal esis ance co esponds o he alue
ob ained om he simula ion.
6. SELECTION OF THE MOST APPROPRIATE PCB
SOLUTION
The new ype o PCB mus be designed wi h ega d no only
o he o e all he mal esis ance bu also o o he pa ame e s.
Since he PCB mus also be su icien ly igid o no bend due
o he mal expansion, he change in co e hickness is
unaccep able ( he change leads o only a small educ ion in
he mal esis ance bu o a g ea educ ion in o e all
s i ness). The c ea ion o he mal ansi ions, ei he by
d illing he dielec ic laye o by he coppe he mal b idge,
aces he lack o expe ience o he companies ha p oduce
p in ed ci cui boa ds. Howe e , he d illing and coppe
pla ing o he dielec ic laye s a e echnologically easie han
milling he coppe co e o o m a he mal b idge. And so i
was decided o he second a ian , i.e. he coppe PCB wi h
h ee coppe -pla ed holes in he dielec ic laye subsequen ly
illed wi h b azing mix u e CuSnAg du ing he solde ing
p ocess. Despi e his, he educ ion in he mal esis ance
should be enough dis inc ly and su icien .
7. MULTI-DIODE PCBS
P e ious calcula ions and simula ions we e pe o med o a
single diode on he PCB. In he design o he linea ligh ,
howe e , is ob iously calcula ed wi h mul iple LEDs. To
achie e he desi ed luminous lux, he spacing be ween he
LEDs was de e mined o be 4 mm. In o de o ob ain a ligh
o al leng h o 4 m, when he p in ed ci cui design is la gely
de e mined by he se ies connec ion o indi idual diodes, and
when ying o main ain a easonable ol age, he PCB was
a anged in 4 pa allel ci cui s, each wi h 13 se ies-connec ed
diodes. Then, 16 such PCBs connec ed in pa allel we e
anged behind each o he (250 mm each). The elec ical
pa ame e s o he p oposed line ligh a e hen: 832 diodes,
48 V ol age, 192 A cu en , and 9216 W powe .
The ask o he nex esea ch was o c ea e he CFD
simula ion again and o de e mine he he mal esis ance o
he p in ed ci cui wi h mo e diodes and o compa e he
esul s wi h he esul s in he p e ious chap e s o de e mine
he e ec o adding diodes o he o e all esis ance. The
simula ion was based on an ea lie simula ion o a single
diode PCB. Howe e , mo e diodes and he ac ual wid h o
he hea conduc ing pas e, me al co e, and dielec ic laye
we e simula ed. The powe loss o he PCB was also
conside ed. As a su icien ly ep esen a i e sample o
de e mine he o e all he mal esis ance o he p in ed ci cui ,
a model wi h en diodes and dimensions o 44.6 x 44.0 mm
was chosen. The esul s o he simula ion a e e iden om
Fig. 11 and Fig.12 o he dis ibu ion o ho izon al and
e ical empe a u es in he p in ed ci cui . The a e age
empe a u e o he bo om and op o he join in he
simula ion was hen e alua ed by he app op ia e epo . The
simula ion esul is a de e mina ed empe a u e di e ence
Δ
T
= 29.6 K.
Fig. 11. Ho izon al empe a u e dis ibu ion and de ail o
solde pads in he middle o he join
Fig. 12. Gene al iew - ho izon al and e ical empe a u e
dis ibu ion in p in ed ci cui boa ds
The equa ions o one-dimensional hea conduc ion show ha
he adding o diodes inc eases he hea lux lowing in o he
sys em and educes i s he mal esis ance, bu he empe a u e
di e ence ∆T be ween he op and bo om emains he same.
Howe e , in simula ions, hea conduc ion is conside ed in all
di ec ions. By sp eading he hea low no only in he e ical
di ec ion o he cooling channel bu also in he ho izon al o
he su oundings o he indi idual diodes, he he mal
esis ance dec eases due o he enla gemen o he "ac i e
a ea o ma e ial". The esul ing he mal esis ance was
calcula ed o 4 K/W ( e sus 4.3 K/W o one diode).
8. RESULTS AND FULFILLMENT OF ESTABLISHED
REQUIREMENTS
Based on he s udy o possible solu ions o educing he
he mal esis ance o he p in ed ci cui and a e e i ica ion
by calcula ions and simula ions, he PCB wi h coppe co e
and he mal ias was chosen wi h espec o se e al
pa ame e s (desc ibed in chap e 6). The elec ical calcula ion
led o he design o a pa ial PCB wi h 52 diodes a anged in
4 pa allel ci cui s, each wi h 13 se ies connec ed diodes. The
dimensions o his PCB a e 250 x 44 mm. The pho og aph o
he p oduced and moun ed PCB can be seen in Fig. 13. The
nex igu e shows he X- ay image o he PCB pa .
452 I. Janako a e al. / IFAC Pape sOnLine 52-27 (2019) 446–452
Fig. 13. The esul ing PCB assembled wi h componen s.
Fig. 14. Con ol X- ay image o PCB wi h solde ed diode
The o al he mal esis ance o he sys em is gi en by he sum
o he pa ial he mal esis ances o he diode, he p in ed
ci cui and he ca ie p o ile wi h he cooling channel. The
manu ac u e speci ied ha XLamp XP-L diode esis ance is
2.2 °C/W. The he mal esis ance o he p oposed PCB wi h
ias in dielec ic was de e mined o be 4.0 K/W (see p e ious
chap e ). The p o ile esis ance was de e mined based on
calcula ions and simula ions o 1.5 K/W (no subjec o his
a icle). The o al he mal esis ance o he sys em is he e o
7.7 K/W, so he equi emen o he maximum he mal
esis ance o less han 10 K/W has been me .
Thanks o he knowledge o indi idual he mal esis ances, i
is possible o de e mine he empe a u es in he whole
sys em. Tempe a u es we e calcula ed a he mos elling
places - a he inle , a he cen e and a he ou le o he
sys em. The esul s o he inle coolan empe a u e 50 °C
a e shown in Table 5. The highes sys em empe a u e
eaches 112.9 ° C o he las diode a he sys em ou pu . The
o al empe a u e di e ence be ween he inle luid and he
las diode is 62.9 °C. The second equi emen , he diode
empe a u e o less han 120 °C was also me . Possibili ies o
u he dec ease he empe a u es in he sys em o o p o ide
a la ge ese e wi h espec o using mo e powe ul diodes in
he u u e is o educe he inle coolan empe a u e.
The e o e, he p ojec p oposed a new cooling sys em wi h
he coolan inle empe a u e o 30 ° C.
Table 5. Pa ial sys em empe a u es
Posi ion o he measu ed
empe a u es
Tepe a u e (°C)
s a means end
Liquid –
P o ile
R = 1,5 K/W
liquid 50,0 52,5 55,0
channel wall 54,5 57,0 59,5
bo om o he PCB
60,6 63,7 66,8
PCB
R = 4,0 K/W
bo om o he PCB
60,6 63,7 66,8
uppe side o PCB 90,2 93,3 96,4
Diode
R = 2,2 K/W
bo om side o diode
90,2 93,3 96,4
uppe side o diode
106,7
109,8
112,9
9. CONCLUSIONS
The p esen ed pape ocuses p ima ily on he pa o he
esea ch conce ning he de e mina ion o PCB he mal
esis ance and sugges ions o adjus men s ha could educe
i . The subjec o in e es was mainly he co e ma e ial o he
PCB, since he mos commonly used classic lamina e co e
has low he mal conduc i i y and is hus unsui able o hea
dissipa ion. The e o e, he aluminum and coppe co e was
also conside ed. By eplacing he indi idual join laye s wi h
pa ial esis ances in he o e all esis ance scheme, he o al
he mal esis ance o he join was de e mined. Because he
esul s ha e shown ha he mal esis ance, e en when using
he aluminum o coppe co e, is s ill unaccep ably la ge, h ee
modi ica ions o he design ha e been p oposed o educe i .
Sugges ions we e submi ed o CFD simula ion. Wi h ega d
o o he pa ame e s, e.g. boa d s i ness and echnological
complexi y, he solu ion wi h coppe co e and wi h h ee
he mal ias was chosen. This inno a i e solu ion educes he
he mal esis ance o he PCB by 30% compa ed o he
classical aluminum co e. The esul s we e hen ans e ed o
mul i-diode PCBs. Combined wi h o he pa s o esea ch
ela ed o he design and simula ion o he p o ile and o hea
ans e o he cooling channel, he o e all he mal esis ance
and he maximum empe a u es in he indi idual pa s o he
de ice we e de e mined ( o he inle empe a u e o coolan
50 °C). The o al he mal esis ance o he sys em is 7.7 K/W
compa ed o he equi ed up o 10 K/W. The highes
empe a u e o he sys em eaches 112.9 °C, when he
demand was se a he maximum o 120 °C.
ACKNOWLEDGEMENT
This wo k was suppo ed by he g an
“CZ.01.1.02/0.0/0.0/16_084/0010376 - Ligh ing sys ems
wi h de ined cha ac e is ics o indus ial ision sys ems and
e icien ligh ing sys ems” which is unded by Minis y o
Indus y and T ade o he Czech Republic - Ope a ional
P og amme En e p ise and Inno a ion o Compe i i eness.
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