scieee AI-readable full text Open interactive document viewer

Detector Development for Particle Physics

Waid, Simon; Jurgen Maier; Gaggl, Philipp; Gsponer, Andreas; Sieberer, Patrick; Babeluk, Maximilian; Bergauer, Thomas

Abstract

In high energy physics experiments, tracking and vertexing is nowadays mostly done using semiconductor detectors. Among the employed detectors are hybrid pixel sensors, passive sensors and recently also depleted monolithic active pixel sensors (DMAPS), which integrate the particle sensor with frontend electronics. The dominant material for the production of such sensors currently is silicon. However, the use of silicon carbide is currently being investigated. In this work we report on our progress on the development of silicon based DMAPS. Further, we present a novel front-end circuit for passive silicon carbide detectors.

Full text

Detector Development for Particle Physics Simon Waid , J¨ urgen Maier , Philipp Gaggl, Andreas Gsponer, Patrick Sieberer, Maximilian Babeluk, Thomas Bergauer Austrian Academy of Sciences,Institute of High Energy Physics,Vienna, Austria E-Mail: [email protected], [email protected] Abstract—In high energy physics experiments, tracking and vertexing is nowadays mostly done using semiconductor detectors. Among the employed detectors are hybrid pixel sensors, passive sensors and recently also depleted monolithic active pixel sensors (DMAPS), which integrate the particle sensor with frontend electronics. The dominant material for the production of such sensors currently is silicon. However, the use of silicon carbide is currently being investigated. In this work we report on our progress on the development of silicon based DMAPS. Further, we present a novel front-end circuit for passive silicon carbide detectors. Index Terms—beam monitor, high energy, detector, sensor, silicon carbide, asic, cmos, radiation hardness, ionizing radiation, maps, dmaps, strip sensor I. INTRODUCTION Particle detectors have evolved over decades. While at first particle tracks were recorded using cloud chambers, several technologies have replaced them since then. One of the main drivers of this development has been the search for rare events requiring the fast recording of events. Up to now this is attained by high spacial accuracy and discrimination of tracks based on the location of the collision. Currently, research is moving towards introducing temporal discrimination of particle tracks. To attain highest spacial accuracy as well as enable fast readout and storage of recorded information, semiconductor based detectors are employed. Among them are hybrid pixel sensors (HPS), passive sensors and depleted monolithic active pixel sensors (DMAPS). In HPS the sensing element and the readout electronics are processed on separate substrates and then bonded together. They provide a larger flexibility in terms of processing of the radiation sensing element and thus offer the highest performance. However, processing sensor and readout circuit separately and bonding them together afterwards increases process complexity which reduces yield and reliability. Still, due to their superior performance HPS are currently the dominant technology for tracking in particle collision experiments. They are employed in the tracker of the CMS, ATLAS and the BELLE-2 experiment. Currently, this dominance is challenged by a new generation of depleted monolithic pixel sensors (DMAPS). DMAPS integrate the sensing element and readout The authors received funding from the Austrian Research Promotion Agency FFG (Project Nr. 883652 and 878691) and the European Union (Project AIDAinnova Grant agreement ID: 101004761). electronics into the same die. This reduces the manufacturing complexity, cost and material budget. Given their advantages, DMAPS can be expected to replace HPS in most applications. At an increased distance from the collision point (after the tracker) the vertex detector is located. Here, ATLAS, BELLE-2 and CMS employ passive strip detectors. These have significantly lower manufacturing costs than MAPS or HPS. Due to their simplicity, they additionally offer a high manufacturing yield and can cover large areas. However, due to the desire to increasing occupancy in experiments, there is ongoing work to replace the strip detectors with pixel sensors. Significant R&D effort is invested at the moment to improve DMAPS, since it can be expected that these will eventually replace both HPS and passive strip sensors in many applications. One example is the BELLE-2 VXD upgrade, where the optimized Belle II pixel sensor (OBELIX) DMAPS is one of the candidate detectors for replacing both the pixel detector and the silicon vertex detector with one unified detector [1]. In regard to substrate materials, silicon is currently dominant for semiconductor detectors. Its main advantages are the availability of low cost wafers and high performance semiconductor processes. However, from a physical perspective silicon is not an ideal detector material since, for example, the dark current at room temperature is high. This renders the detection of small signals a challenging task. Thus, alternatives are under investigation, whereas silicon carbide is (SiC) a very promising candidate [2]. SiC is currently being adopted by an increasing number of semiconductor companies such that high quality substrates are available at moderate costs. Furthermore, more and more foundry services for such substrates are becoming available. As a detector, compared to silicon, SiC promises better time resolution due to its larger saturation velocity (200 µm ns−1versus 100 µm ns−1for Si) [3]. Further, due to it’s low leakage currents after exposure to radiation, it promises to reduce power consumption [3], [4]. As a consequence, SiC is currently gaining substantial attention from the research community. In this work we present our contribution to the development of silicon DMAPS as well as a novel readout frontend for SiC detectors. In the realm of DMAPS we have contributed to the end of column (EOC) circuit of the RD50-MPW3 ASIC. Further, we are working on the on-chip data processing in the Optimized Belle II pixel sensor (OBELIX) geared towards Belle 2 experiment. In the realm of silicon carbide we are working on a primary beam monitor consisting of passive SiC strip detectors. For the readout of SiC strip detectors we979-8-3503-5785-1/23/$31.00 ©2023 IEEE 40 2023 Austrochip Workshop on Microelectronics (Austrochip) | 979-8-3503-5785-1/23/$31.00 ©2023 IEEE | DOI: 10.1109/Austrochip61217.2023.10285161 Authorized licensed use limited to: CERN. Downloaded on October 06,2025 at 14:06:28 UTC from IEEE Xplore. Restrictions apply. present an optimized transimpedance amplifier (TIA) circuit. II. DEPLETED MONOLITHIC PIXEL SENSORS (DMAPS) A. RD50-MPW3 The DMAPS sensor developed withing the RD50 collaboration is implemented in the Lfoundry 150 nm (LF15A) process. The sensor uses a fully depleted substrate for particle detection. The depletion is attained by applying a high voltage between the front side electronics and a backside electrode attached to the thinned-down substrate. Charge collection is performed using the large collection electrode approach. The depletion zone is isolated from the readout electronics via a deep n-well (DNWELL) which is one of the unique features of the LF15A process [5]. The pixel size of the chip is 62 x 62 µm2. The output of a large collection electrode is amplified using a charge sensitive amplifier and shaped. A comparator is used to detect a particle transition. In the case of such an event the status of the global clock is stored in the in-pixel random access memory (RAM) to enable time stamping and time-over-threshold (ToT) measurements. Pixels are read out via a shared column bus, whereas the in-pixel logic enables pixel masking to prevent dead pixels from blocking the column bus. Each column has an EOC circuit in which events are stored and made available for readout via a wishbone bus. The time resolution of the application specific integrated circuit (ASIC) is 40 ns [6]. B. OBELIX The OBELIX sensor is implemented in the TowerJazz 180 nm process. In contrast to the RD50-MPW3 ASIC the design utilizes a small collection electrode. The OBELIX sensor is one of four proposals for the (partial) replacement of the VTX detector of the BELLE-2 experiment. OBELIX is derived from the existing TJ-Monopix2 chip. The sensor will feature a pixel pitch between 30 µmto 40 µmand a timestamp accuracy of 25 ns. In contrast to TJ-Monopix2, OBELIX will have a triggered readout architecture enabling a trigger rate of up to 30 kHz. [1] III. MOVING FROM SILICON TO SILICON CARBIDE A. Silicon Carbide (SiC) Particle Sensors SiC has the favorable property that it’s dark current does not substantially increase after an exposure to ionizing radiation. Measurements of 3 x 3 mm2SiC detector pads, which were irradiated by neutron fluences of up to 1016 neq/cm2[7] reveal, that the dark current remains below 1 pA mm−2in all cases. A comparison to the current spike generated by when a single particle passes through the detector (at least 0.5µA) shows, that the dark current is negligible even for large detector areas. Consequently, the readout circuit does not need a current compensation when accessing the detector. This lowers the losses in the detector, reduces the cooling demands and enables, if desired, a DC coupling between detector and readout circuit. This property even enables the development of sensors that can detect both single particles and particle fluxes, where single particles can not be discriminated anymore. We are aiming to deploy such a device at Medaustron, a cancer treatment center, which provides various particle rates: In the kHz range particle detector tests are run, whereas single particle counting is realized by detecting current spikes. Rates in the GHz range are used for patient treatment and biological research and demand DC coupled measurements. Beams in the THz have already been demonstrated and might become available for research in the near future. The beam monitors currently in operation are only able to operate in one of the two lower regimes, while the novel SiC based monitors will be able to handle both simultaneously. Due to process limitations, i.e., the absence of advanced complementary metal-oxide-semiconductor (CMOS) processing options, SiC is still restricted to passive sensors, e.g., strip detectors, or HPS. Nevertheless, suitable processes, for example the dedicated process for SiC detectors developed by [8], are already available. It consists of a single p-implant into the n-substrate and a single metal layer. Consequently only five masks are required, leading to low costs for prototype production. Together with CNM we have designed several test vehicles for radiation hardness studies and numerous prototype strip detectors for our beam monitor. B. SiC Sensor Readout Commonly detectors are read by utilizing a charge sensitive amplifiers (CSA) in the input stage, which, however, limit the available bandwidth. This is problematic for a SiC device as the high saturation velocity leads to a current pulse duration of only 0.4 ns per particle on a 100 µmthick sensor. Consequently, we switched to a transimpedance amplifier (TIA) based readout front-end optimized for SiC strip detectors. Given the limitations of processing technology available for SiC, the TIA is implemented on silicon. We chose a TIA design based on the “inverter with active common-drain feedback” (ICDF) circuit presented in [9]. Compared to the traditional regulated cascode (RGC)-TIA circuit, the ICDF has a larger gain in the feedback path. This reduces the input impedance and suppresses noise. A similar approach was used in [10], where the amplification was improved by introducing two cascodes in the inverter. The TIA (circuit level implementation shown in Fig. 1) was implemented in a 130 nm silicon CMOS process (Skywater SKY130A). Transistor sizes are provided in Table I. Our design goal was to achieve a sufficient bandwidth for detecting the expected current pulses from a 100 µmthick SiC sensor (at least 1.2 GHz over all temperatures and corners) while simultaneously minimizing noise and input impedance. To attain these design goals, a combination of the circuits given in [9] and [10] was implemented. Compared to [10] the smaller process node made the addition of two cascode transistors to the inverter unfavourable. Instead, only one cascode was introduced to the n-channel part of the inverter, while the cascode was omitted for the p-mos transistor. When connecting the gate of the cascode transistors directly to VDD and GND, as shown in [10], simulations revealed that process 41 Authorized licensed use limited to: CERN. Downloaded on October 06,2025 at 14:06:28 UTC from IEEE Xplore. Restrictions apply. VN VP Out2 Bias1 Input Out1 Bias2 M2 S D BG LVT M4 D S BG M6 S D BG LVT M1 S D B G LVT M5 S D BG LVT R1 B M3 S D BG LVT Fig. 1: Schematic of the TIA. The circuit combines elements of the circuits presented in [9] and [10]. Similarly to [10], the ICDF presented in [9] was augmented by one cascode transistor in the inverter. In contrast to [10] for the used process node only one cascode transistor is more favorable than two. VN VP Out_ref Bias3 Bias1 Bias2 M2B S D BG LVT M4B D S BG M6B S D BG LVT M1B S D B G LVT M5B S D BG LVT R1B B M8 S D BG LVT M7 S D BG LVT M3B S D BG LVT C1 M9 D S BG M10 D S BG Fig. 2: Biasing circuit for the cascode transistor and second copy of the TIA. The biasing circuit counters the impact of temperature and process variations. The second copy of the TIA provides a reference voltage for the output differential amplifier enabling DC current measurements. variations cause significant changes. To suppress this effect we introduced a biasing circuit (see Fig. 2), which, under typical conditions sets the gate voltage almost to VDD. For cases with low threshold voltages, however, the transverse current through the inverter is limited. The chosen sizes are again given in Table I. The TIA features two outputs: Out1 and Out2 (cf. Fig. 1). The authors in [9] used Out1 as the signal was larger, however, in our case Out2 turned out as the optimal one. We chose to TABLE I: Transistor Dimensions Transistor Width Length Transistor Width Length / µm/ µm/ µm/ µm M1, M1B 120 0.15 M6, M6B 240 0.15 M2, M2B 360 0.15 M7 14 0.15 M3, M3B 80 0.15 M8 40 0.15 M4, M4B 80 0.15 M9 240 0.5 M5, M5B 240 1 M10 240 0.15 employ R1 as transimpedance determining element instead of a transistor as done in [9] and [10]. While a transistor promises to increase the usable bandwidth, precision resistors reduce the process dependence of the trans-impedance. Since our design is not primarily optimized for bandwidth and the use of a resistor did not result in any reduction of bandwidth, we opted for this variant. The chosen value for R1 was 1.9 kΩ. We also intend to measure DC currents. For this purpose a copy of the TIA was implemented. The copy provides the output voltage of the TIA when no input current is applied. A series of differential amplifiers is used to match the signal to the intended output impedance of 50 Ω. Similarly to [9], the differential amplifier chain has 3 stages. It adds up to 10 dB of gain to the TIA and has a nominal output impedance of 50 Ω. The copy of the TIA was integrated together with the biasing circuit and is shown in Fig. 2. The TIA output for the input of the differential amplifier is given at Out ref. The Bias voltage for the main TIA is provided at Bias2. The overall layout is shown in Fig. 3. Post layout simulations of the TIA show that the attained bandwidth will be between 1.2 and 1.8 GHz depending on process variations and temperature. For frequencies up to 1.2 GHz the input impedance is below 40 Ω for all temperatures. Thus, an input capacitance of up to 3 pF can be permitted. For the upper bound the input referred noise as a function of frequency is shown in Fig. 4. Below 1.2 GHz it is below 30 pA/√Hz, while a minimum of 10 pA/√Hz is achieved for frequencies between 10 MHz and 200 MHz. IV. CONCLUSION We have reported on our activities on the development of particle detectors. In the domain of DMAPS we have contributed the EOC circuit to the RD50-MPW3 ASIC and are currently working on the on-chip digital processing circuit for the OBELIX pixel sensor. Given the attractive properties of SiC as a detector material we are working on SiC based detectors. As a first application we are using SiC for a primary beam monitor. In this specific application SiC outperforms Si due to it negligible dark current even if exposed to radiation. In our case, detectors can tolerate fluences of up to 1016 neq/cm2while still maintaining dark current levels 3 orders of magnitude smaller than the signal generated by particles. We developed an analog front-end for reading out SiC strip detectors. In contrast to the commonly applied CSA frontend, we chose to implement a TIA for amplifying the signals from the detector. We expect the detector to emit pulses of approx. 0.4 ns and thus optimized the bandwidth of the TIA 42 Authorized licensed use limited to: CERN. Downloaded on October 06,2025 at 14:06:28 UTC from IEEE Xplore. Restrictions apply. Biasing Ref. TIA Output driver TIA Fig. 3: GDS layout of two TIA channels. One biasing circuit supplies both channels. Each TIA channel is composed of two copies of the TIA and a differential output driver. One of two TIAs is attached to the detector, while the other provides a zero-current output voltage as reference for the differential output driver. The submitted chip contains 9 times 2 channels totaling to 18 channels with an average channel pitch of 250µm matched to a SiC strip detector. Fig. 4: Post layout simulation of the input referred noise of the implemented TIA. The input was loaded with a 3 pF capacitor. The noise is below 30 pA/√Hz for frequencies up to 1.2 GHz with a minimum of 10 pA/√Hz between 10 MHz and 200 MHz. to a bandwidth of 1.2 GHz. Due to it’s low input impedance we chose a ICDF-TIA topology for the TIA. For frequencies up to 1.2 GHz, the TIA exhibits an input impedance of 40 Ω. We expect the TIA to be loaded with a detector capacitance of up to 3 pF. When loaded with a 3 pF detector, the noise is below 30 pA/√Hz for frequencies up to 1.2 GHz. It reaches a minimum of 10 pA/√Hz between 10 MHz and 200 MHz. A comparison to other ICDF-TIAs is given in table II. Fig. 5: Input impedance if the TIA. The input impedance is below 40 Ω for frequencies up to 1.2 GHz for all process corners and over the full operating temperature range. TABLE II: Comparison of ICDF-TIAs Reference [10] [9] This work BW / GHz 6 7 1.2 Noise / pA/√Hz 23 22 to 31 10 to 30 REFERENCES [1] M. Babeluk et al., “CMOS MAPS upgrade for the Belle II Vertex Detector,” Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, vol. 1048, p. 168015, Mar. 2023. [2] E. D. R. R. P. Group, “The 2021 ECFA detector research and developement roadmap,” 2021. [3] M. De Napoli, “SiC detectors: A review on the use of silicon carbide as radiation detection material,” Frontiers in Physics, vol. 10, p. 898833, Oct. 2022. [4] P. Gaggl et al., “Charge collection efficiency study on neutron-irradiated planar silicon carbide diodes via UV-TCT,” Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, vol. 1040, p. 167218, Oct. 2022. [5] P. Sieberer et al., “RD50-MPW3: A fully monolithic digital CMOS sensor for future tracking detectors,” Journal of Instrumentation, vol. 18, no. 02, p. C02061, Feb. 2023. [6] P. Sieberer, “Monolithic active pixel sensors for high rate tracking detectors,” Thesis, Technische Universit¨ at Wien, 2023. [7] J. M. Raf´ ıet al., “Electron, Neutron, and Proton Irradiation Effects on SiC Radiation Detectors,” IEEE TRANSACTIONS ON NUCLEAR SCIENCE, vol. 67, no. 12, p. 9, 2020. [8] P. Gaggl et al., “Performance of neutron-irradiated 4H-silicon carbide diodes subjected to alpha radiation,” Journal of Instrumentation, vol. 18, no. 01, p. C01042, Jan. 2023. [9] M. Atef and H. Zimmermann, “Low-power 10 Gb/s inductorless inverter based common-drain active feedback transimpedance amplifier in 40 nm CMOS,” Analog Integrated Circuits and Signal Processing, vol. 76, no. 3, pp. 367–376, Sep. 2013. [10] P. Singh, V. Niranjan, and A. Kumar, “Low Noise And Low Power Transimpedance Amplifier using Inverter Based Local Feedback,” in 2021 International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON). Pune, India: IEEE, Oct. 2021, pp. 1–5. 43 Authorized licensed use limited to: CERN. Downloaded on October 06,2025 at 14:06:28 UTC from IEEE Xplore. Restrictions apply.