REBECCA Project Presentation at FPL 2025 Conference
Abstract
The REBECCA project aims to develop a novel platform for edge AI systems, consisting of a hardware solution and a complete software stack. REBECCA will make scientific and technological advances in key domains, such as AI hardware accelerators and relevant software components and design tools and plans to validate them by employing representative benchmarks and building four real-world demonstrators. REBECCA will develop a chip consisting of two chiplets built on the GF 22nm process. The REBECCA platform will integrate this SoC with an FPGA to expand its capabilities and enable the implementation of additional modules. The platform will include a multicore RISC-V processor, Neuromorphic, Programmable Array and Near-Memory Processing AI accelerators, a DNN Accelerator and security-related components. It will be supported by system SW, middleware, and AI libraries optimized for the underlying hardware. Furthermore, a novel HW/SW Design Space Exploration tool will allow the development of highly efficient REBECCA-based systems. Lastly, REBECCA will provide the means for safety and security modeling and verification for the developed hardware and software. The specific poster focuses on the aspects of reconfigurable hardware used within the REBECCA project. It has been used to present the project during the Research Projects Event within the context of the Field Porgrammable Logic (FPL) Conference 2025. The conference was held in Leiden, The Netherlands on September 1-5, 2025.