scieee AI-readable full text Open interactive document viewer

Development of a TFLN European supply chain

Feugnet, Gilles

Abstract

This is a presentation summarizing some of the results of the Horizon Europe Pattern and H2020 Elena projects. The presentation was given by PATTERN Project Coordinator at the Journées Scientifiques 2025 of the PEPR Électronique. The PEPR Électronique is one of the actions supported by the French government regarding the Electronics. Indeed Electronics form the foundation of today’s digital technologies and services, powering everything from everyday devices to strategic sectors like smart cities, autonomous vehicles, and defense. With the growing importance of mastering the full electronics value chain, the Cetre National de la Recherche Scientifique (CNRS) and the Commissariat à l'Energie Atomique et aux Energies Alternatives (CEA) have been tasked with leading targeted research and innovation initiatives through the PEPR Electronics program, aiming to accelerate technological development, encourage the relocation of production to France or Europe, and ensure sustainable economic and environmental growth.

Full text

www.thalesgroup.com Development of a TFLN European supply chain Gilles Feugnet on behalf of ELENA and PATTERN consortia 2 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Summary Supply chain Wafer manufacturing –Currently available wafer manufacturer is NanoLN in China TFLN chip manufacturing –Need for a stable and reproducible foundry Chip packaging –TFLN offers potential for high speed (> 100GHz) but what about packaging ? 3 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Wafer manufacturing Wafer stack 675 µm Si substrate (CEA-LETI) High resistivity for RF applications 4.7 µm SiO2box Thin Film Lithium Niobate 600nm Done by CEA-LETI in ELENA Steps in TFLN wafer manufacturing Deposition of SiO2 on Si wafers Preparation: polishing/cleaning the LN and SiSiO2 wafers Bonding Removing part of the LN wafer: smart cut Final polishing of the top surface of the TFLN 4 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Wafer manufacturing: results run4 (last) Thickness of the SiO2 box Thickness of the TFLN Flatness, roughness TTV BOW WARP TTV < 10 µm WARP < 100µm RMS roughness < 0,2 nm 5 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Wafer manufacturing: index of refraction Index of refraction 6 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Wafer manufacturing: propagation losses 01/07/2024 6 Loss test method at ETH Zurich (ELENA) Use Resonators to characterize the propagation loss Select resonance close to critical coupling and use 𝛼 = 2𝜋𝜆0 Δ𝜆𝐹𝑆𝑅 𝑄𝐿𝑟𝑒𝑠 and 𝑄 = 𝜆0 𝛿𝜆𝐹𝑊𝐻𝑀 –λ0: Resonance Wavelength –Δ𝜆𝐹𝑆𝑅 : Free spectral range –𝛿𝜆𝐹𝑊𝐻𝑀: Full-width-at-half-max of the resonance –𝐿𝑟𝑒𝑠: Resonator Length –Parameters obtained through fitting –Prior to fitting: Normalization to background Same losses than with NanoLN wafers around 0,2 dB/cm All ETHZ manufactured DUT TLS PC PM TLS: Tunable Laser Source PC: Polarization Controller PM: Power Meter DUT: Device-under-test R = 40 μm R = 80 μm R = 120 μm Post Annealing Δ𝜆𝐹𝑆𝑅 𝛿𝜆𝐹𝑊𝐻𝑀 7 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Wafer manufacturing: Vp.cm 01/07/2024 7 Vp: voltage to get a p phase shift Depends on the modulator length so benchmarking criteria is Vp.cm 6 mm long modulator, Vp=4.2 V so Vp.cm= 2,5 V Same than with NanoLN wafers  8 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Conclusion on wafer manufacturing at CEA-LETI CEA-LETI demonstrates state of the art TFLN wafer Commercialization: SOITEC Perspective/complementarity with 3D-oxide Sapphire substrate instead of HR Si for RF applications Resistivity of the HR substrate to be checked after all the TFLN process Higher box thickness: –diameter of the output mode at exit of edge coupler comparable with that of PM or SLM fibers –No more lensed fiber. Cheaper fiber array 9 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} TFLN circuit manufacturing: CSEM CSEM stack Cladding very important for complex PIC architecture electric line above waveguides, crossing of metallic lines (difficult to avoid when pads on the edge) MET2: top gold electrodes 800 nm thick Cladding (SiO2) 780 nm photonic layer 1550 nm photonic layer MET1 Box SiO2 4.7 µm 4.7 µm 16 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Low Vpi (DC) modulator Crossing of optical waveguide to compensate for the change of sign of the EO effect 20GHz bandwidth Della Torre, A., Dubois, F., Zarebidaki, H., Volpini, A., Leo, J., Mettraux, A., ... & Sattari, H. (2025). Folded electro-optical modulators operating at CMOS voltage level in a thin-film lithium niobate foundry process. Optics Express,33(4), 6747-6757. 17 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} New functionalities: surface acoustic wave Institut des NanoSciences de Paris, UMR 7588, CNRS-Sorbonne Université. Il Goal is acousto-optic modulator on PIC Thin Alumina electrode best but compatibility with CSEM manufacturing process to be evaluated TFLN chip to measure basic characteristic of acoustic waves (speed, absorption) One Interdigited electrode (ITD) emitted the acoustic wave while the second one receives it. 18 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} New functionalities: surface acoustic wave Acoustic wave best confined in TFLN for frequency higher than 2-3 GHz because of the SiO2 box. 300 350 400 450 500 550 600 650 700 -80 -70 -60 -50 -40 -30 -20 -10 0 S12 parameter (dB) Frequency (MHz) 500µm 1000µm 2000µm 4000µm 2000 2500 3000 3500 4000 4500 5000 -120 -110 -100 -90 -80 -70 -60 -50 -40 S12 parameter (dB) Frequency (MHz) 500 µm 1000 µm 2000 µm F = 3.56 GHz No good confinement of the acoustic wave at low frequency (multiple resonances) because of leakage in the BOX layer. Confirmed also by speed Good confinement of the acoustic wave with frequency above 3GHz (single resonance) because lSAW smaller than the box thickness lSAW = 8 µm lSAW = 0.96 µm Optimization of the IDT for >3GHz frequency to be done Design of focusing electrodes underway 19 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} New functionalities: magneto optic isolator Laboratoire des Sciences et Techniques de l'information de la Communication et de la Connaissance, CNRS,UMR 6285 and Laboratoire Albert Fert CNRS-Thales-Université Paris Saclay) Demonstration of the sputtering growth of various garnet films on TFLN. Need to adapt the annealing temperature otherwise change of the LN crystalline structure. After optimization, best candidate is a single layer of (Bi1.5Y1.5)Fe5O12, i.e. Bi:YIG MZI with BiYIG film on top under tests Deposition scheme for TE Faraday rotation hysteresis cycle from Bi:YIG film, 650 nm thick on LNOI. This type of measurements allow to benchmark the films non-reciprocal properties. 20 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Adressed in ELENA/PATTERN but not presented Photonic wire bonding of TFLN chip to fiber array or inP gain section RF packaging aiming at more than 100GHz µtransfer printing of InP gain section 21 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Example of application: Pound Drever Hall engine Implement a single sideband frequency shifter to replace AOM Phase modulator #1 to generate sidebands. –Modulation frequency: few times the cavity FSR : 3 to 4 GHz –Modulation depth: first zero of the besel function J0 for carrier extinction Optical filter to keep only the +1 or -1 sideband Second phase modulator to generate sideband for error signal. – Modulation : few 100’s kHz (transmission) or few MHz (reflexion) –Modulation depth: maximum of J0xJ1 for higher slope Laser not at resonance with the cavity but first sidebands yes –Other sidebands not at resonance –Help increasing the filter rejection ratio –Possibility to remove -filter (chips next run) Optical filter Phase modulator 1 𝜈𝑚1 Phase modulator 2 𝜈0𝜈𝜈0𝜈 𝜈0+𝜈𝑚1 𝜈0+2𝜈𝑚1 𝜈0-𝜈𝑚1 𝜈0-2𝜈𝑚1 𝜈0𝜈 𝜈0+𝜈𝑚1 𝜈0+2𝜈𝑚1 𝜈0-𝜈𝑚1 𝜈0-2𝜈𝑚1 𝜈 𝜈0+𝜈𝑚1 𝜈0+𝜈𝑚1+𝜈𝑚2 𝜈0+𝜈𝑚1−𝜈𝑚2 22 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} GDS Light out Optical filter Phase modulator #2 Phase modulator #1 Light in Monitoring 23 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} Example of application: Pound Drever Hall engine Free-Space Optical propagation is impaired by atmospheric turbulence Fading, scintillation, beam wandering / spreading … Along the propagation, part of the information goes into secondary spatial modes Optical coherence of the beam in the receiver antenna degraded –Limits the single mode fiber coupling efficiency 24 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} TFLN PIC FOR TURBULENCE MITIGATION (1) Split the incoming signal into high-order spatial modes (2) Coherently combine the light from the spatial modes Increases the collected signal power Improves the optical signal to noise ratio Mitigates the atmospheric perturbations (relative phase and intensity control) (1) (2) Billault, Vincent, et al. Optics Express 29.21 (2021): 33134-33143. 25 Thales Research & Technology France trtp version 9.0.0 based on {OPEN} chip T4.3.2 run Eiger 22/10/2025 25 PIC combiner PDs Output fibres DACs ADCs Input fibres 8 channel TFLN coherent combiner Cascaded MZM for phase and amplitude control