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FlexUP: Breaking Up the CU-UP to Speed Up the RAN

Vogt, Francisco

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Paper authors: Vogt, Francisco Victor Hugo Schneider Lopes Caggiani Luizelli, Marcelo Esteve Rothenberg, Christian Papagianni, Chrysa Pongracz, Gergely

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●Finalize FlexUP agents implementation; ●Perform deeper evaluations; ●Considering remove CPU. FlexUP Architecture & Components: POSTER: FlexUP: Breaking Up the CU-UP to Speed Up the RAN Francisco Vogt [email protected] [email protected] Contact: Contributions and Future Work: Existing Approaches: FlexUP Design Overview: Challenges: ●5G RAN needs sub-ms latencies and high throughput, that are difficult to achieve with virtualized RAN components running on General Purpose Processors (GPPs). ●The Centralized Unit (CU) is a frequent bottleneck, because it aggregates traffic from the Distributed Unit (DU). Why not offload some of this computation to in-network processing? ●CUP4: transparent CU-UP offloading onto a programmable ASICs with fast/slow abstraction; ●DESIRE6G: investigate offloading the CU-UP to SmartNICs, also with a fast/slow path abstraction. Francisco Vogt1,3, Victor Lopes2, Marcelo Luizelli2, Christian Rothenberg1, Gergely Pongracz4, Chrysa Papagianni3. 1Universidade Estadual de Campinas (Unicamp), 2Federal University of Pampa (Unipampa), 3University of Amsterdam (UvA), 4Ericsson Research. Context & Motivation: Limitations: ●Initial efforts: both approaches are just initial designs and do not support all CU-UP functionalities; ●Fixed offloading: both strategies propose a fixed offloading decision, based on the available functionalities or manual activation/desactivation. ●Context-aware agents: hierarchical, minimal agents exchange compact path state to enable per‑flow placement with low memory, CPU, and orchestration overhead. ●Resource constraints: limited on‑chip memory and no crypto compression on switches; SmartNICs add flexibility but have limited processing capacity. ●Real‑time decisions: microsecond per‑flow mapping using lightweight heuristics able to balance flow priorities, devices workloads, and improve resource usage. Fast path (switch): implements match‑action features (SDAP, GTP‑U, PDCP sequencing), state monitoring, reordering via recirculation. Medium path (SmartNIC): support all features using accelerators and embedded ARM cores, but has limited processing capacity. Slow path (CPU): traditional CU‑UP deployment (with all functionalities) to ensure operability. Preliminary prototype and results: We prototype on Tofino-1, BlueField‑2 and CPU for fast, medium and slow paths, respectively. ●We present FlexUP, a three-path design and preliminary prototype that splits the CU‑UP processing across switch, SmartNIC, and CPU. ●FlexUP can optimize flow allocation, balancing QoS demands with hardware constraints and load.