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OpenPDK Mismatch Testchip

Martinez Brito, Juan Pablo

Abstract

Outline: Review actual test setup with prober Test automation Circuit approach for device array testing Test results Conclusions

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1 © 2022 OpenPDK Mismatch Testchip Juan Pablo Martinez Brito - CEITEC S.A., Brazil In collaboration with: Jorge Marin - Associate Professor at Pontificia Universidad Católica de Valparaíso Chile Mauricio Montanares - Associate Researcher for Open Source PDK @IHP Germany Fernanda Quintana Muñoz - Electronics Engineer (B.Sc.) Valparaíso, Valparaiso Region, Chile Krzysztof Herman - Research associate for Open PDK Development @ IHP Germany 2 © 2022 Review Actual Test Setup with Prober / Test automation. Circuit approach for device array testing. Test Results. Conclusions. Outline 3 © 2022 PCM Test Structures PCM Test Structure D1 D2 D3 D4 D5 BGS M1 M2 M3 M4 M5 Probe Pads ProbeArray Row 1. M1: (S, G, D1, B) 2. M2: (S, G, D2, B) 3. M3: (S, G, D3, B) 4. M4: (S, G, D4, B) 5. M5: (S, G, D5, B) Each device is selected by accessing proper probe pads Device address : 4 © 2022 4200A-SCS commands the Switch Matrix & the Prober using GP-IB bus. Each device is selected within each row by proper Switch Matrix addressing. The prober walks to multiples rows. The prober also walks from die-to-die using pattern recognition. Test Setup used for automation 4200A-SCS Parameter Analyzer 8 x 12 7174A Switch Matrix Semiautomatic Probe Station 4 SMUs 12 Addressable pins Multipin Probe Head multi pin probe array structure Talking thru GP-IB 5 © 2022 Circuit approach for device array testing 6 © 2022 Research field (Keywords): Rapid (Fast) Device Characterization Test Array Device modeling and Characterization MOSFET Mismatch evaluation Work mainly inspired on : K. Agarwal et al., "A test structure for characterizing local device mismatches," 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers., Honolulu, HI, USA, 2006, pp. 67-68, doi: 10.1109/VLSIC.2006.1705315. My results were published here: J. P. M. Brito and S. Bampi, "Local Variability Evaluation on Effective Channel Length Extracted With Shift-and-Ratio Method," in IEEE Transactions on Electron Devices, vol. 67, no. 11, pp. 4662-4666, Nov. 2020, doi: 10.1109/TED.2020.3017178. Literature review 7 © 2022 Addressing / switching scheme Q0 Q1 Q2 Q3 A B 2-4 Address decoder Thick oxide IO devices for low leakage Switches implemented as Transmission gates D IC A B G S For bonding / packaging; test in a PCB workbench. *bulk terminal erased to simplify the analysis 8 © 2022 A B X Address decoder G C D Y Address decoder S D Problem #1: ➢IR Drop due to the on-resistance of the switches, metal routing, cables, etc. Problem #2: ➢Gate leakage from the non-selected devices. X-Y device array •X Address decoder for Drain selection •Y Address decoder for Source and Gate selection SRAM Array Addressing like 9 © 2022 Problem #1 Problem #1: IR Drop due to the on-resistance of the switches, cables, metal routing, etc. Solution: Kelvin 4-Wires bias solution 16 © 2022 G S(sense) D(force) D(sense) S(force) NClamp GNClamp D(force) IC A B D(sense) S(force) S(sense) C D Device Array with ForceSense & NClamp *address decoders erased to avoid visual pollution. IDS IDS i=0 i=0 ➢Selected gate row connected to G. ➢All other unselected rows connected to NClamp Final circuit for bonding. Test performed in the workbench in a PCB. 17 © 2022 Circuit level block Circuit per bit Block Diagram 18 © 2022 New testchip tape-out 18 @ Design rules IHP SG13G2 Transistor Sizes 19 © 2022 19 MOSFET Matching Test Structure •Complete 5×5 Matrix (25 subarrays) –• Each subarray contains 16×16 = 256 identical transistors –• Total devices per matrix: 25 × 256 = 6,400 devices –• W varies horizontally, L varies vertically –• Enables systematic mismatch analysis versus W, L, and W/L https://github.com/IHP-GmbH/TO_Sep2025/tree/main/MissMatch/doc Scripts for automatic matrix generation are here : 20 © 2022 Addressable test structure that allows to measure devices using ; a parameter analyzer, power supplies, all connected to a PCB (NO PROBE STATION IS REQUIRED) Structure designed to evaluate MOSFET mismatches. But it can be used for any other purpose: Bandgaps, LDMOS, Resistors, etc…. IHP Tape-out in the oven… Conclusions 21 © 2022 Thank you