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An Artificial Intelligence Approach for Real-Time Tuning of Weighting Factors in FCS-MPC for Power Converters

Vázquez Pérez, Sergio; Marino, Daniel; Zafra, Eduardo; Valdés Peña, María Dolores; Rodríguez-Andina, Juan J.; García Franquelo, Leopoldo; Manic, Milos

Abstract

In this paper a finite control set model predic- tive control is used to track a current reference in a power converter connected to an RL load. An artificial intelligence (AI) approach is presented for real-time determination of the weighting factor that regulates the average switching frequency, independently of the operating point. The paper focuses on the design, training, and digital implementation of an artificial neural network (ANN) that can be developed in a low-cost control platform. It is presented a sampling and offline ANN training procedure, together with a low- cost hardware implementation based on integer quantiza- tion of the ANN. The above approach provides a standalone application, serving as a framework for development of ANN applications for power-converters. The main advan- tage of the presented approach is that the ANN inference is executed in real-time. In this way, the weighting factor is automatically updated in real-time, allowing the system to quickly adapt to any reference step changes, and conse- quently provide the desired behavior. Executing the setup in laboratory prototype confirmed the theoretical analysis and successful tracking of the reference frequency

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Depósito de investigación de la Universidad de Sevilla https://idus.us.es/ This is an Accepted Manuscript of an article published IEEE Transactions on Industrial Electronics available at: 10.1109/TIE.2021.3127046 “© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other Works” IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS An Artificial Intelligence Approach for Real-Time Tuning of Weighting Factors in FCS-MPC for Power Converters Sergio Vazquez, Fellow, IEEE, Daniel L. Marino, Student Member, IEEE, Eduardo Zafra, Student Member, IEEE, Maria Dolores Valdes Pena, Member, IEEE, Juan J. Rodr´ ıguez-Andina, Senior Member, IEEE, Leopoldo G. Franquelo, Life Fellow, IEEE and Milos Manic, Fellow, IEEE Abstract—In this paper a finite control set model predictive control is used to track a current reference in a power converter connected to an RL load. An artificial intelligence (AI) approach is presented for real-time determination of the weighting factor that regulates the average switching frequency, independently of the operating point. The paper focuses on the design, training, and digital implementation of an artificial neural network (ANN) that can be developed in a low-cost control platform. It is presented a sampling and offline ANN training procedure, together with a lowcost hardware implementation based on integer quantization of the ANN. The above approach provides a standalone application, serving as a framework for development of ANN applications for power-converters. The main advantage of the presented approach is that the ANN inference is executed in real-time. In this way, the weighting factor is automatically updated in real-time, allowing the system to quickly adapt to any reference step changes, and consequently provide the desired behavior. Executing the setup in laboratory prototype confirmed the theoretical analysis and successful tracking of the reference frequency. I. INTRODUCTION THE finite control set model predictive control (FCSMPC) is a promising alternative for governing power converters [1]–[3]. FCS-MPC defines the desired system behavior Manuscript received May 5th, 2021; revised August 6th and September 27th, 2021; accepted October 29th, 2021. The authors gratefully acknowledge the financial support provided by the project PID2020- 115561RB-C31funded by MCIN/AEI/10.13039/501100011033 and the Consejeria de Economia, Conocimiento, Empresas, y Universidad, Secretaria General de Universidades, Investigacion y Tecnologia, under project P18-RT-1340. Eduardo Zafra gratefully acknowledge the financial support provided by the Spanish Ministry of Universities under grant FPU18/02704. S. Vazquez is with the Laboratory of Engineering for Energy and Envorinmental Sustainability, Universidad de Sevilla, Sevilla, C.P. 41092 Spain (e-mail: [email protected]). D. L. Marino and M. Manic are with the School of Computer Science, Virginia Commonwealth University, Richmond, VA 23284 USA (e-mail: [email protected],[email protected]). E. Zafra, is with the Electronics Department, Universidad de Sevilla, Sevilla, C.P. 41092 Spain (e-mail: [email protected]). M. D. Valdes Pe˜ na and J. J. Rodr´ ıguez-Andina are with the Department of Electronic Technology, University of Vigo, 36310 Vigo, Spain (e-mail: [email protected]; Juan.J[email protected])). L. G. Franquelo is with the Laboratory of Engineering for Energy and Envorinmental Sustainability, Universidad de Sevilla, Spain, and also with the School of Astronautics, Harbin Institute of Technology, Harbin, 150001, P. R. China (e-mail: [email protected]) through a cost function and determines the control action by solving an optimal problem using a prediction model and optimization algorithm [4]. The main features that make FCSMPC attractive to control power converters are: flexibility to adapt to different applications, intuitive design that eases the controller development, capability to manage multi-variable problems, possibility to include system constraints in the control law, and fast dynamic responses [4], [5]. Compared to conventional pulse width modulation (PWM) control strategies, one interesting characteristic of FCS-MPC is that the sampling and switching frequencies are independent [2], [6]. In general, the switching frequency fsw is significantly smaller than the sampling frequency fs[7]. This is advantageous because, for similar switching frequency values, FCSMPC can provide better dynamic and steady-state responses and lower switching losses than the PWM counterparts [5], [8]. This improves system performance, reducing the operating cost of the power converter. The main disadvantage is that the conventional formulation of FCS-MPC produces a variable switching frequency, whose maximum value is limited to half of the sampling frequency, whereas its specific value depends on the operating point [4], [9]. There are several approaches to regulate the switching frequency. For instance, modulated MPC (M2PC) or optimal switching sequence MPC (OSS-MPC) can fix the switching frequency [10]–[13]. However, they achieve this goal at the expense of making sampling and switching frequencies equal. To keep these values independent, the most common solution is to take advantage of the FCS-MPC multi-variable capability, including new terms in the cost function to control fsw [9], [14], [15]. This allows one to regulate the switching frequency. However, a new challenge appears because in this case the cost function requires weighting factors to describe the importance of each term in the optimal problem. The selection of weighting factors is not a trivial problem for FCS-MPC. There are several reasons for this. On one hand, although FCS-MPC has been successfully used in practical applications during several years, there is still a lack of theoretical analysis compared to other MPC techniques [16]. This problem is being gradually solved in recent years with works providing further theoretical knowledge [17], [18]. On the other hand, system performance in each operating point This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS depends on weighting factor values. This means that the weighting factor is not unique, but for each operating point the proper value should be selected [19]. The most common approach to select weighting factors is the heuristic method [20]. In general, this method allows one to find good values for the weighting factors. However, it is time-consuming, as it requires a large number of simulation or experimental results when a wide range of operating points is considered. This makes the approach impractical, limiting the adoption of FCS-MPC for power converters in industry. To address this issue, new alternatives have been proposed to choose weighting factor values, like fuzzy logic or artificial intelligence (AI) techniques [19], [21]. None of these approaches, however, allows weighting factor values to be selected in real time. The main contribution of this paper is the design and validation of a real-time method to automatically select the proper weighting factor value, in order to regulate the average switching frequency for any operating condition of a power converter governed with FCS-MPC. To achieve this goal, an Artificial Neural Network (ANN) is used. Compared to previous solutions [21], [22], the advantage of the presented approach is the implementation of the ANN in a low-cost control platform. This offers the advantage of developing standalone applications that do not require communication to an external hardware to define the controller weighting factors. Compared to the ANN approach presented in [21], the presented methodology uses a quantized ANN to directly predict the optimal weighting factor, with the advantage that no intermediate optimizations are required. The presented approach is motivated by the current availability of lowcost, powerful reconfigurable hardware platforms [23], [24]. These platforms show a very high integration degree of logic and arithmetic resources and are one of the most attractive alternatives to support this kind of applications [25]–[28]. The remainder of the paper is structured as follows. Section II describes the system under study, the control objectives and the FCS-MPC strategy. Section III explains the ANN selected, as well as how data are obtained and the ANN trained. In addition, it shows the quantization procedure, which allows one to implement the proposed ANN in a low-cost control hardware platform. Section IV describes the digital implementation of the proposed strategy. Simulation and experimental results are reported in Section V to validate the proposal. Finally, Section VI provides conclusions. II. PROBLEM STATEMENT A. System model The electric circuit of the system under study is depicted in Fig. 1, and its variables and parameters are summarized in Table I. The system consists of a two-level voltage source inverter (VSI) with an output RL load. The output voltage vector generated by the VSI is uabc and it can be computed as uabc =vdcSabc, where Sabc is the VSI switching state. For the two-level VSI, Sabc components are Sx|x=a,b,c ∈ {0,1}. Finally, the output current vector is denoted by iabc and the voltage of the dc power supply by vdc. TABLE I: Variables and Parameters of the system Description Variable Unit VSI output voltage vector uabc = [uaN ubN ucN ]TV Output current vector iabc = [iaibic]TA Switching state vector Sabc = [SaSbSc]T- DC source voltage vdc V Load inductance LH Load resistance RΩ Sampling frequency fsHz System dynamics can be described using a state space model, which is discretized to enable digital control. The discrete variables at time step kare uk abc,ik abc,Sk abc and vk dc. The stationary αβ frame is used to define the controller. In this way, any vector χk abc is transformed from the abc to αβ frame as χαβ by using the power-invariant Clarke transformation χk αβ =Tαβ abcχk abc, where: Tαβ abc =r2 3  1−1 2−1 2 0√3 2−√3 2 .(1) The discrete state space model is then written as: xk+1 αβ =Aαβxk αβ +Bαβuk αβ,(2) yk αβ =Cαβxk αβ,(3) where xk αβ =ik αβ,uk αβ =vk dcTαβ abcSk abc and yk αβ =ik αβ are the state variable, and the input to and the output of the system at time step k, respectively. Matrices Aαβ,Bαβ and Cαβ can be computed as: Aαβ =eAc αβ Ts,(4) Bαβ =ZTs 0 eAc αβ (Ts−τ)Bc αβdτ, (5) Cαβ =I2,(6) where Ts= 1/fsdenotes the sampling period, fsbeing the sampling frequency, and I2is the identity matrix of dimension 2×2. Matrices Ac αβ and Bc αβ are obtained from the continuous space state model as: Ac αβ =−R LI2;Bc αβ =1 LI2.(7) The discrete space state model (2)-(3) allows one to predict the future behavior of the state variables. Thus, it is used as the prediction model in the FCS-MPC strategy. B. Control Objectives In this application, the main control objective is to track a desired output current: iabc →i? abc. At time step k, the reference i?,k αβ is imposed as a sinusoidal waveform in the αβ frame. This value is computed from the reference output current vector i?,k abc, defined in the abc natural frame through its reference amplitude i? pk and the adequate phase value. This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS Reference generation FCS-MPC ANN Normalize Quantize Dense ReLu Dense ReLu Dequantize Fig. 1: Electric circuit of a VSI with an RL output load and block diagram of the proposed control strategy. An FCS-MPC has been designed to achieve the main control objective. As this strategy presents a variable switching frequency that depends on the operating point, a secondary objective is also imposed to control the switching frequency and limit the switching losses of the system. The goal is to regulate the average switching frequency of the power converter ¯ fsw to a desired reference ¯ f? sw, independently of the operation point of the system: ¯ fsw →¯ f? sw. To achieve this objective, an additional term is included in the cost function to penalize the switching effort. It is proposed to determine the proper weighting factor in real-time by using an ANN. C. FCS-MPC formulation In FCS-MPC, the system behavior is defined through a cost function. For the two control objectives in this application, two terms are defined, with a weighting factor λadjusting the trade-off between them: gj=ki?,k+2 αβ −ik+2,j αβ k2 2+λkSk+1 abc,j −Sk abc,opk2 2,(8) where gjis the cost function value for switching state j. The first term is related to current tracking. It is designed as a quadratic Euclidean distance computing the quadratic tracking error at time step k+ 2. To compute this term, the prediction model determines the predicted output current ik+2 αβ,j for each possible switching state Sk+1 abc,j. This switching state belongs to the finite control set (FCS) of the two-level power converter V, which is defined by all VSI possible switching states. Thus, Sk+1 abc,j ∈V, where V={0,1}3. The second term controls the switching effort and represents the number of power switches that need to change their state when the control input Sk+1 abc,j is selected. Therefore, this term penalizes the switching action and can be used to regulate ¯ fsw. Higher λvalues generate lower average switching frequency values ¯ fsw. Once the cost function is defined, the optimization problem can be stated as finding the input candidate in Vthat minimizes the value of the cost function (8): Sk+1 abc,op = arg min Sk+1 abc,j ∈V gj.(9) This optimization problem can be solved each time step kby using an exhaustive searching algorithm (ESA) [4]. In this problem, the ESA evaluates the cost function gj for all elements in the FCS. Then, the ESA determines by direct comparison the switching state that minimizes the cost function, which is selected as the future control action Sk+1 abc,op to be applied in the next time step k+ 1. D. Average Switching Frequency As stated in Section II-B, the regulation of ¯ fsw is one of the control objectives. Usually, in FCS-MPC applications this regulation is determined heuristically by adjusting λthrough a tedious trial and error process until the desired ¯ fsw is obtained. The main drawback of this method is that an operation point change renders the selected λobsolete and the process has to be repeated. In this paper, an ANN will be used to determine in real-time the proper weighting factor value for each operating point. As described in Section III, the average switching frequency of the VSI is used in the training procedure of the designed ANN. Therefore, it is mandatory to properly define ¯ fsw and to describe its calculation process. Let us assume a current reference characterized by an angular frequency w? o= 2πf? o, where f? ois the target fundamental frequency in Hz. Then, for the period T? o= 1/f? oone can compute the number of switching actions in each phase Na, Nband Ncas: Nabc = [NaNbNc]T,(10) Nabc = N−1 X l=1 Sl abc,op −Sl−1 abc,op,(11) where N=fs/f? orepresents the number of sampling steps in the period To. Then, the average switching frequency can be computed as: ¯ fxx=a,b,c =1 2f? oNx(12) ¯ fsw =1 3¯ fa+¯ fb+¯ fc.(13) where ¯ fxx=a,b,c is the average switching frequency for each phase. III. ARTIFICIAL INTELLIGENCE APPROACH TO SOLVE THE PROBLEM This section presents the use of an ANN to regulate the average switching frequency ¯ fsw. Fig. 1 shows the block diagram of the proposed approach. An ANN is trained to This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS estimate the optimal weighting factor λfor a desired average switching frequency ¯ f? sw and current amplitude i? pk. The switching frequency response is considered as a function ¯ fsw ∼CP(λ, i? pk), where CP is defined by the controller and the plant. The ANN is trained to learn the inverse mapping λ≈NN(¯ fsw, i? pk)1. In order to train the ANN, a database D is constructed by measuring the output ¯ fsw of the controllerplant system for a given (λ, i? pk). To design the controller, a feedforward ANN is chosen because of its simplicity, flexibility, and universal approximation capabilities. A feedforward ANN is a machine-learning model composed by stacked layers that perform non-linear transformations. Dense layers perform an affine transformation of the input followed by an activation function. In this paper, the Rectified Linear Unit (ReLU) activation function is chosen for its low computational cost: ReLU(x)def =(x, if x≥0 0,otherwise The ANN is defined using layers of simple operations that work as templates for constructing complex models. These operations are essentially matrix multiplications and simple activation functions such as ReLU, which are suitable for hardware implementation. The simplicity of feedforward ANNs also allows the implementation of ANN in many control hardware platforms, which is a key aspect in this work. The layers in the ANN can be scaled in complexity in order to achieve a desired trade-off between computational complexity and accuracy in the estimation. Furthermore, the ANN can be easily modified in order to attend the particular needs of the application at hand. The presented ANN approach introduces a sampling algorithm to acquire data from the controller-plant system for offline training. The ANN is trained offline and subsequently quantized to perform inference using only integer operations. The quantization is performed in order to enable the execution of the ANN in a Field Programmable Gate Array (FPGA), minimizing the use of floating-point operations. The following subsections introduces the sampling and training algorithm, followed by the quantization protocol used for inference. A. Data sampling and training In order to build the training dataset, the controller-plant system is iteratively sampled using a partially trained ANN. Algorithm 1 describes the procedure of data sampling and training. The objective of learning an inverse mapping λ≈NN(¯ fsw, i? pk)requires to obtain a dataset with values (¯ fsw, i? pk)sampled uniformly in the operating region. This is desired in order to have a representative dataset in the entire operating region. The controller-plant system allows one to sample ¯ fsw|λ, i? pk, however the input of the ANN is (¯ fsw, i? pk). Uniformly sampling (λ, i? pk)and then using CP to obtain ¯ fsw leads to a set (¯ fsw, i? pk)that is not uniformly 1Note that CP is represented as a probability distribution for notation purposes. The ANN is approximating the expected value Ehλ|¯ fsw, i? pki assuming λhas normal distribution and where ¯ fsw ∼CP(λ, i? pk). sampled, which can potentially leave unexplored regions where no data are available. Algorithm 1 addresses this issue by iteratively sampling the operating region using a partially trained ANN. The idea is to use uniformly sampled reference values (¯ f∗ sw, i? pk[t])as inputs to the partially trained ANN to obtain the value of λthat would produce samples close to the uniformly sampled reference values (¯ f∗ sw, i? pk[t]). Algorithm 1 starts by creating an initial dataset by directly sampling ¯ fsw ∼CP(λ, i? pk)using uniformly sampled inputs. This initial dataset is used to obtain a convex hull that represents the region of valid inputs (¯ f∗ sw, i? pk[t])inside the operating region. After obtaining the initial dataset, an iterative process starts that consist of training the ANN and sampling new data from the controller-plant system. The ANN is trained by minimizing the squared error within the sampled dataset. To prevent overfitting, it is used L1 and L2 regularization on the ANN weights. The L1-L2 regularization is defined by the function Ω: Ω(φ) = r1X l,i,j |W(l) (i,j)|+r2X l,i,j W(l) (i,j)2 where W(l)represents the weight matrix for the layer l, and r1,r2are the coefficients for L1 and L2 regularization, respectively. The partially trained ANN is used to obtain a more uniformly sampled data from the controller-plant system. Samples that do not belong to the original convex hull are removed from the dataset. The reason of removing samples outside of the convex hull is to ignore ANN outputs outside the operating region. This is particularly useful in initial stages, where high estimation errors from the ANN produce samples far away from the operating region. Restricting the samples to the operating region also helps improve the accuracy after quantization. Besides obtaining a more uniformly sampled dataset, the iterative sampling and training also allows one to correct estimation errors of the ANN. Because the outputs of the ANN are used to sample new data, any estimation error made by the ANN will lead to a sample in the dataset that does not match with the estimations of the ANN. The ANN can use this mismatch to correct for the estimation error the next iteration that it is trained. B. Quantization A feedforward ANN has been chosen because its suitability for implementation in resource-constrained hardware. As floating-point operations are computationally expensive, integer quantization is used on the ANN in order to replace floating-point operations with integer operations, which have lower computational cost. A fully quantized ANN performs integer quantization for all weights, bias, and hidden activations. Integer quantization is used based on the Tensorflow Lite quantization protocol [29]. The quantization of an array Xis parameterized by two scalars xmand xz: X=xm(Xq−xz)(14) For the sake of clarity, notation is abused by representing the subtraction of an array with an scalar as Xq−xz. For a dense layer with no activation function, the quantized value of This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS Algorithm 1 Data sampling and training of the ANN Input: Operating region limits [λmin, λmax],[¯ fsw min,¯ fsw max],[i? pkmin, i? pkmax] Output: Trained ANN 1: Initialize dataset: initialize dataset Dwith T0samples from the controller-plant system ¯ fsw ∼CP(λ, i? pk), with λand i? pk sampled in a grid pattern inside the operating region limits. 2: Extract convex-hull of initial dataset, defining the operating region H: H←ConvexHull(X) where Xis the set of weighting factor and current reference (λ, i? pk)extracted from the initial dataset D. 3: for j= 1 to max-iter do 4: Training: Fit the ANN by minimizing the squared error of the predicted weighting factor: φ←arg min P|D| t=0 kNNφ(¯ fsw[t], i? pk[t])−λ[t]k2 2+Ω(φ) where (λ[t],¯ fsw[t], i? pk[t])are extracted from latest dataset D.φare the parameters of the ANN (weights and biases). To prevent overfitting, we use L1 and L2 regularization, represented by the function Ω. 5: Data sampling: obtain new samples from the controller-plant system by using the current estimations of NNφ: ¯ fsw ∼CP(λ, i? pk) where •The weight λ=NNφ(¯ f? sw, i? pk)is obtained using the estimations of the ANN. •¯ f? sw and i? pk are sampled from a uniform distribution in the given operating region. 6: Remove samples outside original convex hull H. 7: end for 8: return NNφ the matrix multiplication Y=WX is obtained by quantizing all matrices in the operation: ym(Yq−yz) = wm(Wq−wz)xm(Xq−xz) The quantized value of the operation is therefore: Yq=wmxm ym | {z } Floating-point (Wq−wz)(Xq−xz) | {z } Integer operations +yz(15) where the floating-point operation is replaced with integer fixed-point operations. The same approach is used for dense layers with ReLU activation function: Yq=1 ym ReLU (wmxm(Wq−wz)(Xq−xz) +bm(Bq−bz)) + yz Because scaling does not affect the output of ReLU, the scaling factor can be moved inside ReLU: Yq=ReLU wmxm ym (Wq−wz)(Xq−xz) +bm ym (Bq−bz)+yz(16) ANN ADC ARM FCS-MPC AXI clk_gen Input Dense Layers Output Synchr. Unit Fig. 2: Block diagram of the proposed controller co-design. The quantization parameters are obtained using TFlite, which obtains them by evaluating the range of inputs, outputs, and hidden activations for a given reference dataset [29]. Fig. 1 shows the components of the quantized ANN with two dense layers with ReLU activation. As a first step, a min-max normalization is used to normalize the inputs before quantization. Normalization is necessary because quantization uses a single scale and zero parameter for both inputs. The minimum and maximum values for normalization are extracted from the minimum and maximum values of (¯ fsw, i? pk)in the initial dataset, which is equivalent to the minimum and maximum values in the operating region (convex-hull). Then, the two Dense ReLU layers are implemented according to (16). ReLU is used on the second layer because the output λ should be always positive. Finally, dequantization transforms the internal quantized value of λinto a floating-point value with the same scale as the sampled dataset. IV. DIGITAL IMPLEMENTATION In this paper, the proposed ANN and FCS-MPC are implemented in a low-cost Field Programmable System-on- Chip (FPSoC). The main design objective is the real-time computation of the proper weighting factor λto achieve the desired average switching frequency ¯ f? sw and track the current reference i? abc. FPSoC devices combine embedded hard processors and reconfigurable logic (FPGA fabric) on a single chip. FPGAs enable powerful, easily scalable implementations of machine-learning algorithms with less power consumption than comparable platforms (in terms of cost or size) [30]. In addition, FPSoCs allow the processing load to be balanced between processors and reconfigurable logic, the most suitable implementation (hardware or software) being used for each specific functional building block to be optimized [31]. A. Hardware/Software Co-Design The VSI digital control has been implemented in a lowcost PYNQ-Z1 development board from Digilent Inc following a hardware/software co-design approach. The board is based on a Xilinx Zynq-7000 SoC device, including an Artix- 7 XC7Z020 FPGA and a dual-core ARM Cortex-A9 hard processor. The FCS-MPC algorithm is coded in software and executed in one of the ARM cores, whereas the ANN computing the λparameter is designed and implemented in the reconfigurable hardware part of the device. This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS A block diagram of the proposed hardware/software codesign is shown in Fig. 2. On one hand, the system main clock signal sysclk is extracted from the ARM processor. A clock divider block clk gen generates a specific clock signal clk required for the ANN part. On the other hand, data i? pk, ¯ f? sw and λ, and synchronization signals i valid,o valid, and clear for the ANN block are exchanged between the FPGA and the processor through an AXI bus. The signals i valid and o valid are used to ensure that the corresponding data are ready to be read from the bus. The clear signal is enabled from the ARM processor when the corresponding weighting factor has been read, allowing the ANN block to compute, when required, a new output through the signal i valid. The Synchr.Unit block controls the ANN internal operation in accordance to these synchronization signals. Finally, the internal ADC is used to obtain the required signal measurements. This process is controlled by the ARM processor through the AXI bus, which is also used to read the corresponding digital sampled values. To maximize system performance, ANN weighting factor computation is allotted during the ADC conversion time. When both tasks are finished, an interruption is triggered in the processor to read data from the AXI bus and perform the FCSMPC algorithm, which outputs the next switching state for the power converter Sk+1 abc,op. B. Hardware Design of the ANN As described in Section III, only ANN inference is performed in the control hardware implementation, whereas training is carried out offline. The proposed ANN has a twolayer feedforward architecture, which has been implemented according to the structure depicted in Fig. 3. The input is in charge of the synchronization of the input reference variables i? pk and ¯ f? sw, whereas the two dense layers are in charge of the computation of the output parameter λ. All nodes of the dense layers have the same structure, depicted in Fig. 4. The first layer consists of 50 nodes, each of them computing (16). The second layer consists of a single node computing (17). In both cases, multiply and addition are the most computational-intensive operations to be implemented. The ReLU activation function is used because it is particularly suitable for hardware implementations [31]. It just checks the sign bit of the intermediate result to decide whether it is preserved or not, so the hardware cost is negligible. Y=ReLU 49 X i=0 XiWi+B!(17) Based on the advantages of reconfigurable logic, the design decisions made to simplify the implementation of the ANN and achieve good performance have been: •To implement a pipelined parallel system, taking advantage of the fact that in this case there are no area constraints. •To define a fully parametric and modular hardware model that facilitates system scalability. •To implement the arithmetic functions of (16) and (17) using multiply/accumulate blocks (called DSP blocks), Input OutputDense layer Dense layer output node (17) node 49 (16) node 0 (16) Fig. 3: Block diagram of the ANN implemented in the FPGA. ReLU function Distributed logic Multiply & add functions DSP48 Blocks Requant function Distributed logic Fig. 4: Block diagram of the nodes in the dense layers. whereas distributed logic is used for the ReLU activation function and some quantization operations (requant function in Fig. 4). •To configure the DSP blocks so that arithmetic operations in (16) are implemented using two of them (DSP block i1and DSP block i2), whereas only one (DSP block i1) is used to implement (17). This configuration is shown in Fig. 5. Taking advantage of the dedicated cascading connection bus PCIN/PCOUT allows adjacent DSP blocks to be combined, reducing data transfer delays. Moreover, the availability of the pre-adder in DSP blocks allows the addition of the bias to be carried out inside them, thus reducing hardware cost and computation time. •To quantize the input data and weights to 16- and 8-bit integer values, respectively. •To carry out the quantization/dequantization of input (i? pk, ¯ f? sw) and output (λ) data (Normalize,Quantize, and Dequantize blocks in Fig. 1) by software in the ARM processor before/after transfer to/from the FPGA. •To set the widths of all internal signals to the minimum possible number of bits that does not affect precision. •As input and weights data are quantized values, all outputs of the dense layers must be adjusted accordingly (requant function in Fig. 4), which means a multiply operation has to be added to each node. To reduce hardware cost and power consumption, shift and add multipliers have been designed. The utilization report of the resulting hardware circuit is shown in Table II. Only 10.56 % of distributed logic resources and 28.18 % of DSP blocks available in the device have been used. Estimated power consumption is 0.334 W. The critical path reported by the design tool is 13.15 ns, resulting in a maximum operating frequency of approximately 76 MHz with a latency of 8 clock cycles. As stated above, the ANN operating time is constrained by the ADC conversion time, which is not a critical parameter in this application. Using This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 16 16 25 25 P 25 DSP block i2 DSP block i1 PCOUT PCIN 24 8 B A Mult 16x8 16 Add 24 8 A Mult 16x8 16 Add B C 25 P Fig. 5: DSP block configurations. TABLE II: Logic resources utilization Parameters Available Used Parameters Available Used DSPs 220 62 LUT as Logic 53200 5606 Slice LUTs 53200 5617 LUT as Memory 17400 11 Slice Registers 106400 1237 MMCME2-ADV 4 1 (a) (b) (c) Fig. 6: Laboratory VSI prototype: (a) VSI and DC supply, (b) control board and graphical user interface and, (c) AC load. more pipeline stages (i.e., adding more latency cycles) the maximum operating frequency could be increased if necessary, but taking into account that this would in turn increase power consumption. Hence, a trade-off between these two parameters may be necessary. V. SIMULATION AND EXPERIMENTAL RESULTS This section addresses the experimental validation of the proposed design in a two-level three-phase VSI prototype with an output RL load shown in Fig. 6. The parameters for the experimental test bench are summarized in Table III. A. ANN Design Evaluation This section evaluates the proposed ANN design using simulation. It assesses both the algorithm that generates the sampled dataset and trains the ANN, as well as the performance of the quantized ANN compared to the float ANN. Data sampling: The dataset for offline training of the ANN model is obtained from a simulation of the system. Data sampling and training is performed according to Algorithm 1. The range of values used in the algorithm to obtain the training dataset are i? pk ∈[5,19] A, ¯ fsw ∈[1.5,12] kHz and λ∈[0,6]. The maximum and minimum values of the operating region are defined based on the power converter nominal operation range. The laboratory prototype is designed for a three-phase output voltage of 400 V and a maximum active power of 10 kW. Thus, the current range is defined from 5 to 19 A. This ensures the maximum is not reached. The minimum is selected to delimit the operation range in the application. For the switching frequency, the maximum is obtained forcing parameter λas zero, resulting as 12 kHz for the defined current operating range. Similarly, the minimum value is selected for the purpose of delimiting the operation range. Even if lower values were possible, 1.5 kHz was selected as a reasonable lower limit, considering the nominal power of the laboratory prototype and the harmonic distortion degradation caused by lower switching frequency values. For the λweighting factor, negative values are not allowed, so zero was selected as the minimum. The maximum value corresponds to the one that provides the selected minimum average switching frequency. Fig. 7 offers information about how many data are extracted for offline training of the proposed ANN. In particular, Fig. 7a shows the ¯ fsw error as new training data samples are obtained during the execution of Algorithm 1. It shows the results of Algorithm 1 running for 10 iterations, with 100 points sampled in each iteration. The error in Fig. 7a is evaluated as the difference between the target and the measured average switching frequency. This error is evaluated using a testing dataset that was obtained with an independent run of Algorithm 1. This testing dataset is kept constant for the entire experiment and it is used only to obtain the reported errors, i.e., it is not used for training. To analyze the performance of the proposed training algorithm, Fig. 7a compares the error obtained with Algorithm 1 against the one using an uniform sampling of the ANN inputs (λ, i? pk). The results show that a lower error is achieved by using Algorithm 1. Fig. 7a shows that the error starts to plateau after 500 samples. Thus, iterations can be stopped as no further reduction is observed. The initial dataset is depicted in Fig. 7b, which is obtained using a grid sample (10x10) inside the operating region limits. Initially, the majority of samples are concentrated in regions where the average switching frequency is low (below 5 kHz). This is due to the sensitivity of the controllerplant output ¯ fsw, which is higher at high frequencies. Fig. 7c demonstrates that the final dataset presents a more uniform distribution in the whole operating region. The final dataset consists of a total of 867 samples, with a total of 133 samples dropped when removing samples outside the convex-hull. ANN units: The ANN performance is evaluated for various number of hidden units in order to obtain the best tradeoff between accuracy and computational complexity. In order to prevent overfitting, the ANN is trained with L1 and L2 weight regularization, with penalty coefficients r1= 1e−5 for L1 and r1= 2e−4for L2. Furthermore, the sampled dataset is split into training and testing datasets, with 80 % for training and 20 % for testing. Fig. 8 shows the error λ, defined as the difference between the ANN λprediction and This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS TABLE III: Parameters for the experimental setup Parameters Value DC source voltage vdc 700 V Load inductance L10 mH Load resistance R15 Ω Sampling frequency fs50 kHz Output current reference frequency f? o50 Hz 100 200 300 400 500 600 700 800 900 # samples 0.5 1.5 1.0 Uniform Algorithm 1 5 10 15 5 10 5 10 15 5 10 (b) (c) (a) Fig. 7: Sampled dataset from simulation: (a) ¯ fsw error with respect to the number of samples in the training dataset, (b) initial dataset and, (c) final sampled dataset. 100 150 500 # units 0.09 0.10 0.11 0.12 0.13 100 150 500 # units 0.20 0.25 0.30 0.35 (a) (b) Fig. 8: ANN performance for different number of hidden units: (a) λerror and, (b) ¯ fsw error. the λobtained from the test dataset, and the ¯ fsw error, obtained in simulation using different number of hidden units with the fully trained ANN. Training and testing datasets used for Fig. 8 were obtained by splitting the final dataset generated using Algorithm 1. Fig. 8 shows the average error for five independent training sessions. The shaded region is bound by the run with the maximum and minimum average error. Both, training and testing datasets were kept constant for all experiments shown in Fig. 8. Taking into account the error and computational cost trade-off, an ANN with 50 units was selected. ANN quantization: Fig. 9 shows a comparison between the float and quantized ANNs from a simulation model with the parameters in Table III implemented in Simulink R . On the left, it shows the estimations of optimal λprovided by the ANN for a fixed target ¯ f? sw and a range of i? pk values. On the right, it plots the resulting ¯ fsw of the controller-plant system compared with the target ¯ f? sw. Fig. 9a presents the results for ¯ f? sw = 3 kHz, which is in the low average switching frequency reference operating region. The quantized ANN is ANN ANN Quantized 6 8 10 12 14 16 18 6 8 10 12 14 16 18 2.0 3.0 2.5 3.5 2.9 3.0 3.1 3.2 ANN ANN Quantized (a) 12 13 14 15 16 ANN ANN Quantized 11.0 10.0 10.5 9.5 12 13 14 15 16 ANN ANN Quantized 0.10 0.12 0.14 0.16 0.18 0.20 (b) Fig. 9: Estimated λand ¯ fsw for the float and quantized ANNs: (a) ¯ f? sw = 3 kHz and, (b) ¯ f? sw = 10 kHz. 0.0100.0050.0 -0.005 -0.010 0.0100.0050.0-0.005-0.010 3.75 3.85 3.80 8.4 8.5 8.6 (a) (b) Fig. 10: Pseudo-randomness and sensitivity. Current reference i? pk = 12 A: (a) ¯ f? sw = 3.84 kHz and, (b) ¯ f? sw = 8.5kHz. able to successfully approximate the float ANN. This results in a weighting factor λthat produces a ¯ fsw within ±0.2kHz of the reference frequency. Although the simulations used in the study are deterministic, small changes in the inputs cause non-smooth changes in the output, resulting in pseudorandomness in the system response, illustrated in Fig. 9a. Fig. 9b illustrate the system response for ¯ f? sw = 10 kHz, which is a representative value in the high ¯ f? sw operating region. As it was expected, the system response has a much higher sensitivity for higher frequencies, i.e. small changes in λhave larger effects in the output ¯ fsw. In this case, the effects of quantization are evident due to the lower range in λ. Although the system provides a ¯ fsw close to the desired reference, the higher sensitivity results in a non negligible deviation from the command and, it produces higher fluctuations in the resulting ¯ fsw compared to the low ¯ f? sw operating region. Pseudo-randomness and sensitivity: In this paper, the analysis and simulation of the plant is deterministic. However, a pseudo-random behavior of the ¯ fsw plant response is observed, specially with respect to changes in λ. This fact is depicted in Fig. 10 for different target frequencies. This figure uses the λprovided by the ANN as reference, with small ∆λchanges shown in the x-axis in the range [−10−2,10−2]. A large variation of ¯ fsw happens with small changes in λ. Even when the simulation is completely deterministic, these variations resemble random behavior. Fig. 10 also shows the change of sensitivity of ¯ fsw with This article has been accepted for publication in IEEE Transactions on Industrial Electronics. This is the author's version which has not been fully edited and content may change prior to final publication. Citation information: DOI 10.1109/TIE.2021.3127046 © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See https://www.ieee.org/publications/rights/index.html for more information.