Super class AB RFC OTA using nonlinear current mirrors

1 Super class AB RFC OTA using nonlinear current mirrors M.P. Garde, A. J. Lopez-Martin, R. G. Carvajal, J.A. Galan and J. Ramirez-Angulo An alternative approach to the design of super class AB recycling folded cascode operational transconductance amplifiers is proposed. Instead of using local common-mode feedback for boosting dynamic currents, simple current mirrors with input transistors entering triode region for large currents are employed. Measurement results from a 0.5 μm CMOS test chip validate the proposal. Introduction: Super Class AB Operational Transconductance Amplifiers (OTAs) are a very attractive solution when power efficiency is required. They feature both very low quiescent current consumption and very high dynamic current boosting, with output currents ideally proportional to Vid4 (with Vid the differential input voltage). This is achieved by the use of single-stage topologies where dynamic current boosting is carried out both at the adaptive biasing and active load of the differential pair [1]. Recently super class AB operation has been applied to the Recycling Folded Cascode (RFC) OTA [2], [3]. However, reported super class AB RFC OTAs require additional local common-mode feedback (LCMFB) loops at the active load of the differential pair, either using passive [2] or active [3] matched resistors. In this Letter we propose an alternative implementation of a super class AB RFC OTA which does not modify the active load. Dynamic current boosting at the active load is achieved just varying the bias point of such load. This approach was formerly applied by the authors to the current mirror OTA in [4] and it is thus extended here to the RFC OTA. Circuit Description: The conventional Folded Cascode (FC) OTA and RFC OTA [5] are shown in Fig. 1a and 1b, respectively. Transistors in the differential pair and NMOS current sources have been split in Fig. 1a to simplify comparison with Fig. 1b. The gain-bandwidth product (GBW) and slew rate (SR) of the FC OTA are 𝐺𝐺𝐺𝐺𝐺𝐺𝐹𝐹𝐹𝐹 =2𝑔𝑔𝑚𝑚1𝐴𝐴 2𝜋𝜋𝐹𝐹𝐿𝐿 (1) 𝑆𝑆𝑆𝑆𝐹𝐹𝐹𝐹 =2𝐼𝐼𝐵𝐵 𝐹𝐹𝐿𝐿 (2) where gmi is the transconductance of transistor Mi. The RFC OTA improves GBW by a factor 1+K and SR by a factor K, where K is the current gain of the NMOS current mirrors in the RFC OTA that replace the NMOS current sources of the FC OTA. However, in practice K is not higher than 4 to prevent too much phase margin (PM) degradation [5], so the improvement is limited. Moreover, SR is still proportional to IB and power efficiency is limited since factor K scales both static and dynamic currents. These issues are overcome by the super class AB RFC OTAs in [2], [3], but they require not only an adaptive bias current source but also rearranging transistors M3B-M4B and including two extra local feedback loops that employ two matched resistors. A simpler way to overcome these drawbacks without altering the arrangement of M3B- M4B is proposed here and is shown in Fig. 1c. The adaptive bias current source is the same as in [1]-[3]. It is formed by two cross-coupled Flipped Voltage Followers (FVFs) [1] (M1C-M2C and M1D-M2D) that allow in M1A, M1B, M2A and M2B a well-controlled quiescent current IB/2 and dynamic current not limited by IB. This adaptive bias is the only topological change in Fig. 1c versus the RFC OTA of Fig. 1b. The extra dynamic current boosting at the active load of the differential pair is achieved by changing the bias voltage of the cascode transistors M3C-M4C. This new bias voltage VBIAS is chosen so that in quiescent conditions (i.e. with current IB/2 flowing through M3B- M3C and M4B-M4C) transistors M3B and M4B operate in saturation, but close to the ohmic region (with VDS slightly larger than VDS,sat=VGS-VTH). Hence, in quiescent and small-signal conditions M3A-M3B and M4A-M4B act as linear current mirrors. However, when Vid > 0, current I2B in M2B increases, which increases VGS,3C. This way, VDS,3B decreases, driving M3B into triode region. As a result the gate voltage of M3A-M3B increases notably, yielding a large current in transistor M3A (which is in saturation region) that is conveyed to the output by M5 and M7-M10. M 1B M 4A M 2B M 3A M 6 M 5 M 7 M 8 M 9 M 10 V CP V CN V OUT V CP M 2A M 1A B I2 M 3B M 4B V BN V IN- V IN+ M 1B M 4A M 2B M 3A V CN V CN M 2A M 1A M 3B M 3C M 4B M 4C V IN- V IN+ a b 1 : K K : 1 B I2 M 6 M 5 M 7 M 8 M 9 M 10 V CP V CN V OUT V CP M 1B M 2B M 6 M 5 M 7 M 8 M 9 M 10 V CP V CN V OUT V CP M 2A M 1A M 1D M 2D M 1C M 2C V IN- V IN+ I B /2 I B /2 V BIAS c M 4A M 3A M 3B M 3C M 4B M 4C 1 : K K : 1 V BIAS M 11 V BIAS I B ' Fig. 1 Single-stage folded cascode OTAs a Conventional class A FC OTA b RFC OTA c Proposed super class AB RFC OTA An approximate analytical expression for the output current Iout when Vid > 0 can be obtained using the simple square-law MOS model for strong inversion and saturation region and the expression for ohmic region and low VDS given by ID = β ·(VGS – VTH)·VDS. The resulting current in M3A is 𝐼𝐼3𝐴𝐴 =𝛽𝛽3𝐴𝐴 2�𝐼𝐼2𝐵𝐵 𝛽𝛽3𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,3𝐵𝐵�2 (3) where βi=µCox(W/L)i and 𝑉𝑉𝐷𝐷𝐷𝐷,3𝐵𝐵 =𝑉𝑉𝐵𝐵𝐼𝐼𝐴𝐴𝐷𝐷 −�2𝐼𝐼2𝐵𝐵 𝛽𝛽3𝐹𝐹 ⁄−𝑉𝑉𝑇𝑇𝑇𝑇. Expressing I2B as a function of Vid, current I3A becomes 𝐼𝐼3𝐴𝐴 =𝛽𝛽3𝐴𝐴 2�𝛽𝛽2𝐵𝐵 2𝛽𝛽3𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,3𝐵𝐵��𝐼𝐼𝐵𝐵 𝛽𝛽1𝐵𝐵 +𝑉𝑉𝑖𝑖𝑖𝑖�2�2 . (4) For a large positive differential input step of A Volts current in M1A and M4A is very low and M2A enters deep triode region, so Iout ≈ I3A and 𝑆𝑆𝑆𝑆+≈𝛽𝛽3𝐴𝐴 2𝐹𝐹𝐿𝐿�𝛽𝛽2𝐵𝐵 2𝛽𝛽3𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,3𝐵𝐵𝐴𝐴2�2≈𝐾𝐾 8𝐹𝐹𝐿𝐿𝛽𝛽2𝐵𝐵 2 𝛽𝛽3𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,3𝐵𝐵 2𝐴𝐴4 . (5) Analogously, if Vid < 0: 𝐼𝐼4𝐴𝐴 =𝛽𝛽4𝐴𝐴 2�𝛽𝛽1𝐵𝐵 2𝛽𝛽4𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,4𝐵𝐵��𝐼𝐼𝐵𝐵 𝛽𝛽2𝐵𝐵 −𝑉𝑉𝑖𝑖𝑖𝑖�2�2 (6) and for a large negative differential input step of -A Volts, Iout ≈ -I4A and 𝑆𝑆𝑆𝑆−≈𝛽𝛽4𝐴𝐴 2𝐹𝐹𝐿𝐿�𝛽𝛽1𝐵𝐵 2𝛽𝛽4𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,4𝐵𝐵𝐴𝐴2�2≈𝐾𝐾 8𝐹𝐹𝐿𝐿𝛽𝛽1𝐵𝐵 2 𝛽𝛽4𝐵𝐵𝑉𝑉𝐷𝐷𝐷𝐷,4𝐵𝐵 2𝐴𝐴4 . (7) In practice SR is lower due to second-order effects not considered in the analysis and since transistors operating in saturation may leave this region for large inputs. Note however that a large SR compatible with low static power is achieved as SR is not proportional to IB. A simple and robust way to generate VBIAS is shown in Fig. 1c. Choosing IB’ and the W/L of M11 correctly, VDS3B,4B can be set slightly above VDS,sat regardless of process, temperature or supply voltage variations as VBIAS is set by the VGS of a scaled replica of M3B-M4B. The adaptive bias current source employed also improves GBW, as the full differential input signal is applied to each input transistor [1]. This paper is a postprint of a paper submitted to and accepted for publication in Electronics Letters and is subject to Institution of Engineering and Technology copyright. The copy of record is available at the IET Digital Library https://doi.org/10.1049/el.2018.6880 2 Measurement Results: The three OTAs of Fig. 1 were included on a 0.5 μm CMOS chip prototype. Transistors M1A, M1B, M1C, M2A, M2B, M2C have an aspect ratio (in µm/µm) of 190/0.6, that of M1D, M2D, M3B, M3C, M4B, M4C is 60/0.6, M3A, M4A have 180/0.6, that of M5, M6 is 120/0.6, that of M7, M8, M9, M10 is 200/0.6 and that of M11 is 15/0.6. Fig. 2 shows a microphotograph of the OTAs in Fig. 1. Supply voltage was set to ±1 V, IB = IB’ = 10 µA, VCP = -0.5 V and VCN = 0.3 V. The measured transient response in voltage follower configuration of the three OTAs is shown in Fig. 3. An external load capacitor of 47 pF was connected. However, including the capacitance of the test setup (pad, board and test probe), the overall load capacitance is CL ≈70 pF. The input signal was a 1 MHz 0.5 V periodic square wave, whose DC level was -0.6 V. Table 1 summarizes the main measured performance parameters. Note an improved SR by a factor of 28 versus the FC OTA. Fig. 2 Microphotograph of the OTAs of Fig. 1 Fig. 3 Measured transient response of the OTAs of Fig. 1 Table 1: Measured performance summary (CL = 70 pF) Parameter Fig. 1a Fig. 1b Fig. 1c SR+ 0.26 V/μs 0.48 V/μs 7.27 V/μs SR- -0.86 V/μs -1.5 V/μs -18.8 V/μs THD @25kHz, 0.5Vpp -37.81 dB -44.54 dB -47.85 dB DC gain (*) 60.26 dB 68.37 dB 75.06 dB PM (*) 89º 86.62º 76.34º GBW 480 kHz 950 kHz 3.4 MHz CMRR @ DC 97 dB 111 dB 112 dB PSRR+ @ DC 73 dB 82 dB 89 dB PSRR- @ DC 93 dB 104 dB 105 dB Eq. input noise @1MHz 49 nV/√Hz 35 nV/√Hz 22 nV/√Hz Power 80 μW 80 μW 100 μW Area 0.020 mm2 0.024 mm2 0.026 mm2 (*) Simulation In order to compare with other class AB amplifiers, two conventional figures of merit (FoM) are used: FoML=SR·CL/Isupply = ImaxL/Isupply, where Isupply is the total static current consumption, and FoMS=GBW·CL/Isupply (MHz·pF/mA). Note that the proposed OTA shows competitive smallsignal and large-signal performance. Fig.1c Fig.1b [6] [7] [8] [9] [10] Fig.1a Fig. 5 Performance comparison Conclusion: Proper biasing of the differential pair active load in the RFC OTA can provide dynamic current boosting in a simple way. Together with an adaptive biasing current source, efficient super class AB operation can be achieved. Acknowledgments: This work was funded by the Spanish Ministerio de Economía y Competitividad (grant TEC2016-80396-C2-1-R) M. P. Garde and A. J. Lopez-Martin (Institute of Smart Cities, Public University of Navarra, 31006 Pamplona, Spain) E-mail: [email protected] R. G. Carvajal (Dept. of Electronic Eng., University of Seville, 41092 Sevilla, Spain) J. A. Galan (Dept. of Electronic Eng., University of Huelva, 21071 Huelva, Spain) J. Ramirez-Angulo (Klipsch School of Electrical & Computer Eng., New Mexico State University, Las Cruces, NM 88003-0001, USA) References 1. Lopez-Martin, A., Baswa, S., Ramirez-Angulo, J., Carvajal, R.G., ‘Low-voltage super class AB CMOS OTA cells with very high slew rate and power efficiency’, IEEE J. Solid-State Cir., 2005, 40, (5), pp. 1068-1077, doi: 10.1109/JSSC.2005.845977 2. Garde, M.P., Lopez-Martin, A., Carvajal, R.G., Ramirez-Angulo, J., ‘Super class AB recycling folded cascode OTA’, IEEE J. Solid-State Cir., 2018, 53, (9), pp. 2614 - 2623, doi: 10.1109/JSSC.2018.2844371 3. Garde, M.P., Lopez-Martin, A., Carvajal, R.G., Ramirez-Angulo, J., ‘Super class AB RFC OTA with adaptive local common-mode feedback’, Electron. Lett., in press, doi: 10.1049/el.2018.6362 4. Galan, J.A., Lopez-Martin, A., Carvajal, R.G., Ramirez-Angulo, J., Rubia-Marcos, C., ‘Super class-AB OTAs with adaptive biasing and dynamic output current scaling’, IEEE Trans. Cir. Syst. I, 2007, 54, (3), pp. 449-457, doi: 10.1109/TCSI.2006.887639 5. Assaad, R. S., Silva-Martinez, J., ‘The recycling folded cascode: A general enhancement of the folded cascode amplifier’, IEEE J. Solid State Cir., 2009,44,(9), pp. 2535-2542, doi: 0.1109/JSSC.2009.2024819 6. Valero Bernal, M.R., Celma, S., Medrano, N., Calvo, B., ‘An ultralow-power low-voltage class-AB fully differential OpAmp for long-life autonomous portable equipment,’ IEEE Trans. Cir. Syst. II, 2012, 59, (10), pp. 643-647, doi: 10.1109/TCSII.2012.2213361 7. Garde, M.P., Lopez-Martin, A., Ramirez-Angulo, J., ‘Power-efficient class AB telescopic cascode opamp’, Electron. Lett., 2018, 54, (10), pp. 620-622, doi: 10.1049/el.2018.0771 8. Cabrera-Bernal, E., Pennisi, S., Grasso, A.D., Torralba, A., Carvajal, R.G., ‘0.7V three-stage class-AB CMOS Operational Transconductance Amplifier’, IEEE Trans. Cir. Syst. I, 2016, 63, (11), pp. 1807-1815, doi: 10.1109/TCSI.2016.2597440 9. Saso, J.M. Lopez-Martin, A., Garde, M.P., Ramirez-Angulo, J., ‘Power-efficient class AB fully differential amplifier’, Electron. Lett., 2017, 53, (19), pp. 1298-1300, doi: 10.1049/el.2017.2070 10. Sutula, S., Dei, M., Teres, L., and Serra-Graells, F., ‘Variablemirror amplifier: A new family of process-independent class-AB singlestage OTAs for low-power SC circuits’, IEEE Trans. Cir. Syst. I, 2016, 63, (8), pp. 1101-1110, doi: 10.1109/TCSI.2016.2577838