Integrated Control and Modulation for Three-Level NPC Rectifiers

energies Article Integrated Control and Modulation for Three-Level NPC Rectifiers Antonio Ventosa-Cutillas 1,* , Pablo Montero-Robina 1, Francisco Umbría 2, Federico Cuesta 1and Francisco Gordillo 1 1Departamento de Sistemas y Automática, Escuela Técnica Superior de Ingeniería, Universidad de Sevilla, 41092 Sevilla, Spain; [email protected] (P.M.-R.); [email protected] (F.C.); [email protected] (F.G.) 2ASM Assembly Systems GmbH & Co. KG, 81379 Munich, Germany; [email protected] *Correspondence: [email protected]; Tel.: +34-95-448-2292 Received: 8 April 2019; Accepted: 26 April 2019; Published: 30 April 2019   Abstract: This paper uses a novel approach for the control of three-level neutral-point-clamped (NPC) rectifiers in order to tackle the capacitor voltage balance problem. A distinctive feature of the new control approach is that it is based on a model which is written in terms of the duty ratios for each phase at each level. Hence, the system model presents nine duty cycle variables. Despite the fact that this formulation is different from the usual ones, it is shown that the control problem of currents and dc-link voltage can be formulated in a similar way to conventional methods. Furthermore, the control of the capacitor voltage balance can be expressed by means of equations that are decoupled from the currents and dc-link voltage dynamics, which results in a specific controller for the voltage balancing that does not affect the previous dynamics. A key point of the proposed approach is that part of the modulation stage is implicit in the formulation. Two particular controllers are compared in this paper. The first one fulfills the different control objectives at the expense of a large number of commutations. This problem is overcome in a new proposed controller, which presents similar performance and a satisfactory number of commutations. Experimental results are performed showing the effectiveness compared with a modified virtual space vector modulation with capacitor voltage balance capabilities. Keywords: synchronous rectifier application; neutral-point-clamped (NPC) converter; voltage balancing; integrated control and modulation (ICM); Grid-connected power converter; multilevel converters 1. Introduction In the field of energy conversion systems, the advantages that multilevel power electronic converters offer are well known. Bidirectional power flow, increase of the output voltage magnitude, robustness, etc. are only some of the advantages that have made multilevel converters popular in medium and high power applications in the industry [ 1 – 3 ]. Some of the different types of topologies of these converters are neutral-point-clamped, cascaded H-bridge or flying-capacitor [ 1 , 2 , 4 ]. A Neutral-point-clamped (NPC) converter, which was proposed for the first time in [ 5 ], is one of the most used multilevel converter topologies. During normal operation, the voltage that drops across each capacitor must be balanced otherwise, it can result in poor output voltage quality, affecting the performance of the control or even damaging the semiconductor devices. Therefore, NPC converters present an additional objective apart from the usual control objectives in power converters [ 6 ] that is the voltage balance between capacitors, which is the main focus in this paper. Over the last few years, numerous techniques have been developed to correct the voltage unbalance. Some of them use additional circuitry [ 7 – 9 ], but this would lead to an increase in cost, losses and complexity in hardware. Other authors use different control techniques with algorithms of varying difficulty [ 10 – 15 ]. One of these control techniques [ 13 ] uses a modification of virtual space Energies 2019,12, 1641; doi:10.3390/en12091641 www.mdpi.com/journal/energies Energies 2019,12, 1641 2 of 15 vector [ 16 ] (denoted as mVSVPWM in this paper). In [ 13 ], the voltage reference vector is obtained by creating virtual vectors where the possible switching states are weighted to generate currents that benefit the voltage balance. Regarding the modelling, it is usual to work with averaged models where the discrete values of the gating elements are considered as continuous signals [ 1 , 17 ]. In order to implement the control laws obtained with such models, a discretization stage, usually called modulation, needs to be accomplished [ 18 ]. Modulation plays an important role in the overall system performance since properties such as number of commutations and harmonic distortion of currents and voltages are affected by the way modulation is carried out. Modulation methods can be classified into three main groups [ 19 ]: pulse width modulation (PWM) [ 20 , 21 ], pseudo-modulation [ 22 ] and closed-loop control methods with implicit modulator [23–25]. This paper presents a new approach to deal with the control of three-level NPC converters, which is based on [ 26 ]. In this paper, the circuit model is formulated in terms of the duty ratios of each phase at each level. In this way, there are nine duty cycle variables (three duty cycles per phase) instead of just three (one duty cycle per phase). This formulation is not new, e.g., a similar model, based on d–q transformation, was presented in [ 27 ] to design an LQR controller for an NPC inverter by linearization using a small-signal model. In [ 26 ], it is shown that this formulation allows to explicitly consider, in the control design stage, the extra degree of freedom associated with the injection of homopolar component. The increase in the number of variables does not make the design significantly more difficult since, with an appropriate change of variables, the dc-link voltage and active and reactive power control problems can be formulated in a similar way to other usual approaches. As a result, the voltage balance controller can be easily designed at the same time that an important part of modulation is not needed. For this, the proposed approach can be considered as a control method with part of the modulation stage included in the control formulation, therefore, in what follows it would be called “Integrated Control and Modulation” (ICM). The main advantage of the proposed control law is its simplicity in implementation compared to modified versions of space vector modulation (SVM) [ 16 ] that also tackle the capacitor voltage unbalance but it still presents some advantages with respect to CB-PWM approaches. This is due to the fact that the modulation stage is simplified without losing part of the flexibility of SVM [ 28 , 29 ]. Once the nine duties are computed, the way they are sequenced can be chosen freely, splitting them up or shifting them among the different phases. This freedom allows the user to achieve secondary control objectives similarly to SVM such as common-mode voltage reduction or avoidance of extra switching losses. For the sake of a fair comparison, this article will use a simple triangular-shaped sequence similar to that of CB-PWM approaches. Furthermore, the problem formulation for power, current and dc-link voltage control is the same as when using other conventional approaches, such as model-based direct power control (DPC) [30–33] or proportional-resonant controller (PR) for currents [34,35]. The drawback of the proposed approach in [ 26 ] is that it may lead to an unnecessary increase in the number of commutations. This is due to the fact that, unless some of the duty cycle variables turn out to be zero, the resultant switching signals will commute among all the levels for the three phases every sampling period. This is the case of the first control law considered in this paper (ICM1), whereas with the dc-link voltage, current or power control can be accomplished by switching each phase between two levels [ 36 ] when the voltage balance problem is not considered. In this paper, by using a remaining degree of freedom associated with the injection of homopolar component, some commutations are avoided compared to ICM1 presenting a second controller (ICM2) who explodes this capability. The output waveform of ICM2, as it will be shown later on in experiments, is similar to those approaches which inject a third harmonic signal into the output voltage to increase the fundamental signal range without overmodulating [ 37 ]. Therefore, ICM2 also has this property inherent without the need of extra computations. Both control laws are validated by means of experiments and compared with a control technique based on a modified virtual space vector modulation (mVSVPWM) [ 13 ], which includes capacitor Energies 2019,12, 1641 3 of 15 voltage balance capabilities. Therefore, the main contributions of this paper in comparison with [ 26 ] are the inclusion of a new approach (ICM2) along with experimental verification of both approaches. The next section is devoted to presenting the converter considered in this paper, as well as its dynamic model. Section 3presents the controller design for fulfilling the three control objectives: regulation of the currents and the dc-link voltage and capacitor voltage balance. Section 4proposes two variants for the selection of the remaining degrees of freedom resulting in two different controllers, ICM1 and ICM2. Section 5presents experimental results. The paper closes with a section of conclusions. 2. Dynamic Model of the System The configuration of the converter used in this paper is a three-phase three-level NPC converter in rectifier mode with a resistive load, as shown in the scheme of Figure 1. Figure 1. Schematic diagram of the three-phase three-level neutral-point-clamped (NPC) rectifier. The electrical power grid is considered as a three-phase voltage source, where the phase voltages are represented by vsa , vsb and vsc . The converter is connected to the grid through an inductive filter where inductances have the same value L. On the dc-link side, capacitors have the same value C and their voltages are denoted by vc1 and vc2 . Connected to the converter terminals there is a resistive load R . The total dc-link voltage is defined as vdc =vc1+vc2. Considered System Model The model considered in this paper is described in [ 26 ], which is based on a model presented in [ 27 ]. This model uses the equations in αβγ coordinates by introducing the power-invariant form of the Clarke Transform. Furthermore, the switching signals have been replaced by their respective duty ratios in each level [ 27 , 38 ], dij with i=α , β , γ and j=p , o , n , where p is the positive level when switches Si 1 and Si 2 are closed, o is the zero level when switches Si 1 and Si 2 are closed and n is the negative level when switches Si 1and Si 2are closed. This formulism yields Ldiα dt =vsα−(dαp−dαn)vdc 2−(dαp+dαn)vd 2(1) Ldiβ dt =vsβ−(dβp−dβn)vdc 2−(dβp+dβn)vd 2(2) Cdvdc dt = (dαp−dαn)iα+ (dβp−dβn)iβ−2vdc R(3) Cdvd dt = (dαp+dαn)iα+ (dβp+dβn)iβ, (4) Energies 2019,12, 1641 4 of 15 where vd is the dc-link capacitor voltage difference defined by vd=vc1−vc2 . The control inputs dαp , dαn , dβp and dβn are the duty ratios in αβγ coordinates. Control inputs dγp and dγn do not appear in the model, as mentioned in [ 26 ], because they are multiplied by iγ , whose value is zero for a balanced system. Similarly, variables dio do not appear in this model but their values can be retrieved at the final stage of the controller using the following constraints: dap +dao +dan =1 (5) dbp +dbo +dbn =1 (6) dcp +dco +dcn =1 (7) dij ∈[0, 1], for i=a,b,cand j=p,o,n. Phase currents iαand iβcan be expressed in terms of powers as iα=1 v2 sα+v2 sβvsαp−vsβq(8) iβ=1 v2 sα+v2 sβvsβp+vsαq, (9) where p and q are the instantaneous active and reactive powers of the system, respectively. In this way, (3) and (4) could be expressed as Cdvdc dt =1 v2 sα+v2 sβdαp−dαnvsαp−vsβq+1 v2 sα+v2 sβdβp−dβnvsβp+vsαq−2vdc R(10) Cdvd dt =1 v2 sα+v2 sβdαp+dαnvsαp−vsβq+1 v2 sα+v2 sβdβp+dβnvsβp+vsαq, (11) where variables vdc and vdare expressed in terms of the instantaneous power pand q. 3. Controller Design With the purpose of dealing with the three control objectives (currents, dc-link voltage and capacitor voltage balance control), the system dynamic model (1) – (4) presented previously is considered to design the controllers in this section. It can be seen that the proposed modeling allows to cope with the capacitor voltage balance problem while it does not affect the current and dc-link voltage controllers. 3.1. Total DC-Link Voltage Controller In order to maintain constant the dc-link voltage and close to its reference ( vr dc ), as usual, a PI controller is used [26,30,39], pr=kdc pvr dc 2−v2 dc+kdc iZt 0vr dc 2−v2 dcdτ, (12) where constants kdc pand kdc iare controller tuning parameters. Energies 2019,12, 1641 5 of 15 3.2. Current Controller Observing Equations (1) and (2), two virtual control variables can be defined as u1˙=dαp−dαn(13) u2˙=dβp−dβn. (14) Introducing these variables into the currents dynamic model and assuming that the value of variable vdis small enough to be neglected, Ldiα dt =vsα−u1 vdc 2(15) Ldiβ dt =vsβ−u2 vdc 2. (16) These expressions are equivalent to those current dynamics of the conventional two-level converter [ 26 ]. Therefore, by the use of the change of variables (13) and (14), the added difficulty inherent for the adopted formulation disappears, at least at this stage. Additionally, introducing the references for the active ( pr ) and reactive power ( qr ) into (8) and (9) , the current references can be retrieved ( ir α , ir β ). Once these values are known, a non-ideal proportional-resonant controller [ 35 ], tuned at the grid frequency, is used to make the phase currents to track their references. In this way, the tracking error (ir α−iα , ir β−iβ) inputs the resonant controller, providing the value for control variables (u1,u2). GPRω(s) = kp+2krωcs s2+2ωcs+ω2 u1=2 vdc (−GPRωg(ir α−iα) + vsα)(17) u2=2 vdc (−GPRωg(ir β−iβ) + vsβ)(18) where kp and kr are the proportional and resonant control parameters; ωc is the cut-off frequency of the low-pass filter implemented into the resonant part; and ω is the resonant frequency—tuned at the grid frequency ωg. 3.3. Voltage Balance Controller The objective of the voltage balance controller is to keep the state variable vd close to zero, avoiding the unbalance of the dc-link capacitor voltages, and it is based on the definition of two new virtual control variables u3˙=dαp+dαn(19) u4˙=dβp+dβn. (20) Introduction of (19) and (20) into (11) yields Cdvd dt =vsαp−vsβq v2 sα+v2 sβ u3+vsβp+vsαq v2 sα+v2 sβ u4. (21) It is important to highlight that the definition of u3 and u4 causes a decoupling of the virtual control variables for control purposes. Note that u1 and u2 are designed to regulate the state variables p and q , whereas u3 and u4 can be used to regulate vd(21) . This is an important benefit of the proposed control approach. Energies 2019,12, 1641 6 of 15 Taking into account (21), the proposed control laws [26] are defined as follows u3=kd vsαp−vsβq p2+q2(vr d−vd)+kdi vsαp−vsβq p2+q2Zt 0 (vr d−vd)dτ(22) u4=kd vsβp+vsαq p2+q2(vr d−vd)+kdi vsβp+vsαq p2+q2Zt 0 (vr d−vd)dτ, (23) where positive constants kd and kdi are customary tuning parameters. The reference for vd is denoted by vr d , which is set to zero to ensure a balanced distribution of the dc-link voltage across capacitors C1 and C2. By introducing (22) and (23) into (21), the voltage balance dynamics become linear: Cd2(vr d−vd) dt2+kd d(vr d−vd) dt +kdi(vr d−vd) = 0, (24) whose stability is assured provided that parameters kd and kdi are positive. A complete schematic block diagram of all controllers is illustrated in Figure 2. Figure 2. Complete schematic block diagram of the controllers. Energies 2019,12, 1641 7 of 15 4. Modulation Strategy The controller presented in the previous section provides, at each sampling time, the values for u1 , u2 , u3 and u4 . The corresponding values for dαp , dαn , dβp and dβn can be obtained solving the system of Equations (13), (14), (19) and (20) yielding dαp=1 2(u1+u3)(25) dαn=1 2(−u1+u3)(26) dβp=1 2(u2+u4)(27) dβn=1 2(−u2+u4)(28) In order to compute the actual duty ratios dij , i=a , b , c ; j=p , n , the Clarke transformation can be used    daj dbj dcj   =r2 3         1 0 1 √2 −1 2 √3 2 1 √2 −1 2−√3 2 1 √2            dαj dβj dγj   ,j=p,n. (29) where dγp and dγn are remaining degrees of freedom. Obviously, the remaining duty ratios, dao , dbo and dco can be computed using (5)–(7). 4.1. First Proposal, ICM1 The first variant, ICM1, was proposed in [ 26 ]. In this variant, dγp and dγn are chosen to be constant and can be considered as tuning parameters. In [ 26 ], guidelines are given in order to avoid saturation problems. This approach is a simple way to accomplish the modulation but it presents an important drawback: except by chance, none of the dij will result in zero. This implies that, in each sampling time, each phase commutes among the three levels, which can be considered too many commutations compared with other controllers, even those including voltage balancing. This fact could yield large switching losses. 4.2. Second Proposal, ICM2 In order to avoid the large number of commutations, a new variant is proposed. This variant takes advantage of the two degrees of freedom associated with dγp and dγn by imposing, at each sampling period, one dip and one din to be zero. The two phases for which one of the duty ratios has to be zero need to be chosen carefully, as it is explained below, taking into account that the duty cycles in abc coordinates have to be in the interval [ 0, 1 ] . The result is that these two phases only switch between two levels while the remaining phase commutes among the three levels. In order to select these phases, the procedure checks if setting one of the dij,i=a,b,c;j=p,nto zero yields to the fulfillment of the constraints 0 ≤dij ≤ 1 for the rest of duty cycle variables. Starting with the case dap = 0, Equation (29) for j=p can be considered as a set of equations, where dαp , dβp are known, dap = 0 and dbp , dcp and dγp are the unknowns. The resultant system of equations can be solved in order to check if this case is feasible, that is, if dbp and dcp are in the interval [ 0, 1 ] . Repeating to the other phases, three different cases have to be analyzed for j=p and other three cases for j=n . The associated equations are Energies 2019,12, 1641 8 of 15 Case 1: daj =0 dbj =−√6 2dαj+√2 2dβj(30) dcj =−√6 2dαj−√2 2dβj(31) Case 2: dbj =0 daj =√6 2dαj−√2 2dβj(32) dcj =−√2dβj(33) Case 3: dcj =0 daj =√6 2dαj+√2 2dβj(34) dbj =√2dβj, (35) where j = p , n . The resultant duty ratios for the considered sampling instant are the corresponding ones to the feasible cases, that is, cases where all the duty cycles are in the interval [ 0, 1 ] . It will be shown below that, at every instant, there exists at least one (and apart from some border cases, only one) feasible case. Regarding the computation burden of this approach, after retrieving (25)–(28), the calculation of the duty ratios dij can be achieved by checking the constraints dij ∈[ 0, 1 ] for the 3 × 2 = 6 cases. For this, (30)–(35) have to be used twice (for levels p and n ). This last stage implies the computation of 20 multiplications and 8 sums as well as 24 comparisons. Alternatively, a different approach can be used to choose the correct case at every sampling instant with the help of Figure 3. This figure depicts the straight lines that are the boundaries of constraints 0 ≤dij ≤ 1 using expressions (30) – (35) . Consequently, the shaded regions represent the fulfillment of these constraints for each one of the three cases above. As for each level j=p , n there is one dij that it is equal to zero, there are four of such lines for each case, instead of six. It can be seen that the three shadowed areas do not overlap (except at their borders) and that they cover a whole hexagon. An interesting fact is that this hexagon is related to the well-known hexagon of Space Vector Modulation (SVM), but in this case, there are two such hexagons (one for j=p and one for j=n ). The interest of Figure 3is twofold: (1) it shows that, provided the converter does not work in overmodulation region, one of the three cases is always feasible, and (2) Figure 3can be used as an alternative method to choose the correct case: the working sector can be computed as usual in SVM and once the appropriate case is selected, the corresponding formulae can be applied. In summary, the ICM2 algorithm, whose data input and output are depicted in Figure 4, can be implemented in two alternative and equivalent ways that only differ in the computational burden, which in alternative B depends on the method used for the computation of the sextant: Alternative A: •Computation of u3and u4using (22) and (23). •Computation of dαp,dαn,dβp,dβnusing (25)–(28). •For levels pand n: – Computation of Equations (30)–(35) and selection of the case that fulfills the constraints 0≤dij ≤1. This procedure gives directly the resultant duty cycles. Energies 2019,12, 1641 9 of 15 Alternative B: •Computation of u3and u4using (22) and (23). •Computation of dαp,dαn,dβp,dβn(25)–(28). •For levels pand n: – Computation of the sextant inside the hexagon of Figure 3. This step is similar to the corresponding one in SVM (but it must be computed twice, one for level p and one for level n). The sextant gives the corresponding case. –Computation of the duties using the corresponding Equations of (30)–(35). It can be noted that the computational complexity is lower in both ICM1 and ICM2 with respect to SVM strategies that include control of the voltage balance, such as [13]. Figure 3. Graphical representation of the limits of each case. Figure 4. Data input and output of ICM1 and ICM2. 5. Experimental Verification This section presents the experimental results obtained in the laboratory for the two approaches presented in this paper and the one used as a comparative (mVSVPWM) [ 13 ]. To this end, the three-level NPC converter shown in Figure 5has been used. It has been configured as rectifier and it has the circuit and control parameters provided in Table 1. A first-order low-pass filter has also been added to the proportional part of the total dc-link voltage controller, as it is recommended in [ 33 ], tuned at 5 KHz in order to reduce the harmonics presence.