A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators

A SIMULINK-BASED APPROACH FOR FAST AND PRECISE SIMULATION OF SWITCHED-CAPACITOR, SWITCHED-CURRENT AND CONTINUOUS-TIME EA MODULATORS Ja ie Mo eno-Reina, Jos 2 M. de la Rosa, Fe nando Medei o, Ra ael Romay, Rocio del Rio, Bel& Pk ez- Ve du and Angel Rod iguez- Vazquez Ins i u o de Mic oelec onica de Se illa, IMSE-CNM (CSIC) Edi . CNM-CICA, A da. Reina Me cedes s/n, 4 1012 Se illa, SPAIN Phone: +34 95056666, FAX: +34 95056686, E-mail: [email p o ec ed] ABSTRACT This pape desc ibes how o ex end he capabili ies o SIMULINK o he ime-domain simula ion o ZA modula o s implemen ed by using swi ched-capaci o , swi ched-cu en and con inuous- ime ci cui s. conside ing he mos impo an e o mechanisms. The beha iou al models o hese ci cui s a e inco po a ed in o he SIMULINK en i onmen by using C-language S- unc ion blocks, which leads o a d as ic sa ing in he simula ion ime as compa ed o p e ious app oaches based on MATLAB unc ions. The ou - come is a comple e SIMULINK block lib a y ha allows in e ac- i e, as and accu a e simula ion o an a bi a y ZA opology (*I. 1. INTRODUCTION Simula ion is a c i ical pa o bo h he op-down syn hesis and he bo om-up e i ica ion o In eg a ed Ci cui s (ICs). Thus, he i e - a i e use o simula o s helps designe s o explo e he design space and o op imize c i ical ade-o s a di e en hie a chical le els [I]. In he case o ZA Modula o s (ZAMs), as a consequence o hei sampled-da a na u e, simula ion has o be done in he ime-domain. Howe e , ansis o -le el simula ions wi h SPICE-like simula o s yield o excessi ely long CPU imes - yp- ically se e al days, o e en weeks. The eason is ha se e al hou- sands clock cycles - wi h small nume ical in eg a ion s eps and complex models- a e needed o ob ain a ealis ic e alua ion [2]. To o e come his 'p oblem, di e en al e na i es o he simula- ion o ZAMs ha e been p oposed, which a he p ice o losing ac- cu acy in hei models, educe he simula ion ime [2][3][4]. One o he bes accu acy-speed ade-o is achie ed by using he so-called beha iou al simula ion echnique [ 11. In his app oach he modula o is b oken up in o a se o subci cui s, o en called building blocks, which a e desc ibed by explici equa ions ha e- la e he ou pu s in e ms o he inpu s and he in emal s a e a ia- bles. Thus, he accu acy o he simula ion depends on how p e- cisely hose equa ions desc ibe he eal beha iou o each block. In case o Disc e e-Time (DT) CAMS implemen ed wi h ei he swi ched-capaci o (SC) [3] o swi ched-cu en (SI) ci cui s [5], he alue o signals is impo an only a speci ic ime poin s. The e o e, each building block is de ined by a se o ini e di e - ence equa ions which desc ibe i s unc ionali y, and he simula ion p ocess consis s o compu ing he node ol ages and b anch cu - en s o he ci cui consecu i ely in each clock phase. The ou - come is a d as ic sa ing in CPU ime - only a ew seconds o e al- ua e an ou pu spec um. Recen ly, beha iou al simula ion has been applied also o Con inuous-Time (CT) CAMS [6]. In his case, model equa ions a e compu ed analy ically ins ead o nu- me ically, leading o CPU imes compa able wi h he DT case. "'This wo k has been suppo ed by he EU ESPRIT IST P ojec 2001-34283lTAMES-2 and he Spanish CICYT P ojec TIC2001-0929/ADAVERE. In spi e o hei good ade-o be ween p ecision and CPU- ime, p e iously epo ed beha iou al simula o s p esen se e al d aw- backs. On he one hand, he e is a limi ed numbe o ZAM opolo- gies ha can be simula ed, no mally using only one ci cui ech- nique. On he o he hand, excep o [4], he use in e ace consis s o an inpu ne lis wi h a dedica ed syn ax, while pos p ocessing is pe o med by using comme cial ools like MATLAB [7]. The abo e-men ioned p oblems can be o e come by implemen - ing he beha iou al models in he SIMULINK en i onmen [8]. The bene i s a e a iendly G aphical Use in e ace (GUI), high lexibili y o he ex ension o he block lib a y and huge signal p ocessing capabili ies. Recen ly, a se o SIMULINK block mod- els has been p oposed o he beha iou al simula ion o SC ZAMs [9]. Howe e , i has wo majo cons ain s: The block lib a y is limi ed o SC ci cui s, using simple models which do no include some impo an limi a ions like misma ch and he non-linea i ies associa ed o he open-loop opamp DC gain and capaci o s. In addi ion, as models a e implemen ed in he Z-domain, he ci cui beha iou du ing di e en clock phases is no conside ed, hus leading o an imp ecise model- ling o some e o s like he incomple e se ling. Block models a e ealized by using MATLAB unc ions. This causes he MATLAB in e p e e o be called a each ime s ep, slowing down he simula ion ime d as ically [8]. This p oblem is agg a a ed as he model complexi y inc eases, yielding o excessi e CPU imes as compa ed o C-w i en simula o s. This is ue e en using he SIMULINK accele a o [8]. This pape p esen s an in e ac i e and lexible app oach o a as ime-domain beha iou al simula ion o Lowpass (LP) and Band- Pass (BP) ZAMs implemen ed by using no only SC, bu also SI and CT ci cui s. In o de o speed up he simula ion, EA-blocks a e inco po a ed in SIMULINK las C-coded S- unc ions [IO]. As a esul he CPU- ime o one 65536-poin simula ion o a DT/CT ZAM is ypically less han 5 seconds 2, meaning only a ew imes slowe han C-w i en simula o s, bu up o 2 o de s o magni ude as e han using MATLAB unc ions as in [9]. 2. DESCRIPTION OF THE XAM-BLOCK LIBRARY The p oposed SIMULINK ZAM-block lib a y includes di e en sublib a ies which a e classi ied acco ding o he modula o hie - a chy le el and he ci cui echnique. As an illus a ion, Fig.1 shows some o hese sublib a ies showing: SI memo y cells, SCCT in eg a o s and esona o s (used in BP-ZAMs), quan ize s, 71. SIMULINK 5 and MATLAB 6.5 ( elease 13) we e used. 2. All simula ions shown in his pape we e done using an In el Pen ium 4 [email p o ec ed] @256MB RAM PC. 0-7803-7761-3/03/$17.00 02003 IEEE IV-620 Figu e 1. Illus a ing some blocks o he p oposed SIMULINK CAM-block lib a y. and bo h 1 -bi and mul i-bi (mb) Digi al- o-Analog Con e e s (DACs). The e is also a sublib a y including he mos usual a chi- ec u es o bo h LP- and BP-CAMS using SC, SI and CT ci cui s. Fo each building block, he CAM-block lib a y p o ides models wi h a di e en abs ac ion le el. The pu pose is wo old. Fi s , high le el models a e sui ed o sys em le el simula ions and ini- ial ansmission o speci ica ions. Second, low le el accu a e models, which akes in o accoun main ci cui pa asi ics, a e sui - ed o ine- uning he specs ansmission and ci cui alida ion. The main ci cui non-ideali ies included in he in eg a o s (and esona o s) a e: - SC ci cui s: ini e open-loop opamp DC gain, incomple e se - ling e o , misma ch capaci o a io e o , he mal noise; and main non-linea e ec s, namely: non-linea sampling swi ch-on esis ance, non-linea open-loop opamp DC gain, slew a e and non-linea capaci o s. CT ci cui s: ini e DC gain, in eg a ion ime cons an e o , slew a e, ini e non-linea ansconduc ance and he mal noise. SI ci cui s: linea and non-linea gain e o , ini e ou pu -inpu conduc ance a io e o , cha ge injec ion e o , incomple e se - ling e o , misma ch e o and he mal noise. De ailed desc ip ions o hese e o s as well as hei beha iou al models - beyond he scope o his pape - can be ound in [3], [ 113 and [SI o SC, CT and SI ci cui s, espec i ely. In addi ion o in eg a o s and esona o s, quan ize and DAC e - o s ha e o be conside ed, specially in SC/SI cascade mb a chi- ec u es and CT single-loop opologies. Fo his pu pose, he ol- :lowing ci cui pa asi ics ha e been included: s quan ize s: o se , bo h de e minis ic and andom hys e esis, and in mb ealiza ions, gain e o and in eg al non-linea i y. single-bi and mul i-bi DAG: o se , gain e o and in eg al non-linea i y. In case o CT ZAh4s, a ime delay is also included in o de o simula e he e ec o excess loop delay [ 1 I]. The beha iou al models o he abo e-men ioned e o s ha e been -coded in C language, and inco po a ed in o he SIMULINK en i- onmen h ough he so-called S unc ions [lo]. These a e special pu pose C sou ce iles which allow us o add C algo i hms o SIMULINK models. The ou come is a no able sa ing o simula- ion ime as compa ed o use MATLAB unc ions o M- iles o code he models, e en when he accele a o u ili y is used [8]. In o de o c ea e an S- unc ion associa ed o building blocks like hose shown in Fig. 1, he ollowing s eps ha e o be ollowed: C ea e a C-coded S- unc ion con aining he beha iou al model. Fo his pu pose, SIMULINK p o ides di e en S- unc- ion empla es which can accommoda e he C-coded model o bo h DT and CT sys ems. These empla es a e composed o se e al ou ines ha pe o m di e en asks equi ed a each simula ion s age [IO]. Among he o he s, hese asks include: a iable ini ializa ion, compu ing ou pu a iables, upda ing s a e a iables, e c. Thus, p og amme s’ wo k simply consis s in placing he C-coded beha iou al model in he di e en pa s o he empla e ile. Fo illus a ion pu poses, Fig. 2(a) shows he beha iou al modeling and some signi ican sec ions o he S- unc ion ile associa ed o an SC in eg a o wi h non-linea opamp DC gain - no included in [9]. I includes model pa am- e e s, clock phase diag am, model code, e c. Compiling he CMEX-- ile S- unc ion. This is done by using he mex u ili y p o ided by MATLAB [IO]. The esul ing objec iles a e dynamically linked in o SIMULINK when needed. Inco po a ing he model in o he SIMULINK en i onmen . This is done by using he S- unc ion block o he SIMULINK lib a ies [8]. Fig.2(b) illus a es his p ocess o he SC in eg a- o o Fig.2(a). A block diag am con aining he S- unc ion block is c ea ed including he inpu /ou pu pins. The dialogue box is used o speci y he name o he unde lying S- unc ion - in his case in esca nl. In addi ion, model pa ame e s a e also included in his box. In o de o acili a e he use o building blocks, he use can inse he alues o model pa ame e s om a dialogue box associa ed o he block. 3. SIMULATION EXAMPLES An a bi a y modula o a chi ec u e can be de ined by connec ing he building blocks a ailable in he CAM-block lib a y. This can be done by using he SIMULINK Lib a y b owse as usual. Al e - na i ely, he ZAM-block lib a y can be b owsed by using a dedi- IV-62 1 - Figu e 2. Basic s eps o inco po a e a beha iou al model in he EAM-block lib a y: (a) S- unc ion ile. (b) S- unc ion block. ca ed GUI ha allows he use o na iga e in an easy way h ough all he s eps o he simula ion and pos -p ocessing o esul s. As an illus a ion o he capabili ies o he ZAM-block lib a y, his sec ion shows he impac o some ci cui pa asi ics on he pe - o mance o he ollowing modula o a chi ec u es: 0 A CT (Gm-C) 2nd-o de LP-CAM (CT 2nd-LPZAM). - A SI 4 h-o de BP-ZAM (SI 4 h-BPZAM). * A SC 2-1-1 cascade mb (3b) ZAM (SC 2-12mb). Fig.3 shows he block diag am o hese a chi ec u es in he SIMULINK en i onmen , including building blocks om he CAM-block lib a y. 3.1 CT 2nd-LPZAM example In he example shown in Fig.3(a), an ideal I-bi quan ize was used while he o he blocks include he ollowing pa ame e s: 0 Gm-C in eg a o s: ini e DC gain, ime-cons an e o , uni y Figu e 3. Block diag am o he ZAM-lib ay examples. (a) CT 2nd-LPZAM. (b) SI 4 h-BPZAM. (c) SC 2-1 mb. gain equency, slew a e, empe a u e and ou pu -swing. DAC: e e ence ol age and ime delay. In high-speed applica ions, he pe o mance o he modula o can be se e ely deg aded by ini e bandwid h and slew a e. These e - o s cause an inc ease o bo h he in-band noise powe and he ha monic dis o ion. This is illus a ed in he ou pu spec um o Fij:.4(a), ob ained by pe o ming an Hanning-windowed 65536-poin FFT o he ou pu bi s eam o Fig.3(a), wi h a hal -scale@lO-kHz inpu one, when clocked a 20 MHz. This si nula ion akes 3 seconds when he accele a o is used. In addi ion o in eg a o dynamics, one o he mos impo an lim- i ing ac o s a ising in CT-ZAMs is he ime delay be ween he quan ize clock edge and DAC esponse. This delay, e e ed o as excess loop delay, modi ies he noise-shaping ans e unc ions, and may e en ually make CT-ZAMs uns able [ 1 13. Ma hema ical- ly speaking, a complex analysis would be equi ed o ob ain he s abili y condi ion ha ela es he loop delay, T~, wi h he clock -20 . -180 SGIdeaI -200 . ' ' ' ..''.'' . ' IO2 I 0' I 0' I o6 Yo7 IO' F equency (Hz) 0 IW 200 300 4Ml 5W 6W 700 800 9W loo0 Timc (#clock pc iods) Figu e 4. Pe o mance deg ada ion o a CT 2nd-LPZAM. (a) Ha monic dis o ion caused by slew a e. (b) E ec o excess loop delay on he ansien esponse o he i s in eg a o . IV-622 pe iod, T, . Ins ead o ha , simula ion-based analyses a e no mal- ly used. As an illus a ion, Fig.4(b) shows he i s in eg a o ou - pu wa e o m o di e en alues o he DAC ime delay, show- ing uns able beha iou o zd = 3 Ts/2 . 3.2 SI 4 h-BPXAM example The SI 4 h-BPZAM shown in Fig.3(b) has been ob ained by ap- plying a LP- o-BP ans o ma ion (z-’ 4 -z-~ ) o a 2nd-LPZAM. As a consequence o his ans o ma ion, he ze oes o he noise ans e unc ion shi om DC o a qua e o he sampling e- quency, s. In addi ion, he in eg a o s in he o iginal LP-CAM become esona o s. In his example, esona o s a e based on loss- less di ec in eg a o s. No e ha a on -end block, named SI bu - e , is used o model he ol age- o-cu en con e sion. One o he mos impo an deg ading ac o s in SI BP-CAMS is he signal-dependen ansconduc ance o memo y cells, g, , which o ce all e o s o be non-linea . As a consequence, in addi ion o inc ease he in-band noise powe , SI e o s cause In e uodula ion - Dis o ion (IMD). As an illus a ion, Fig.5 shows he impac o he non-linea se ling on he pe o mance o he modula o in Fig.3(b). In his case, he ga e-sou ce capaci ance o memo y an- sis o s, CgS, is a ied showing h ee e ec s: inc ease o he in-band noise, hi d-o de IMD and a shi o he quan iza ion noise- il e ing no ch equency, S ,. These ou pu spec a a e ob- ained by unning wo 65536-poin simula ions o Fig.3(b), each one aking 4 seconds. 3.3 sc 2-1~~6 example In he case o SC CAMs, he beha iou al models o building blocks ha e been ansla ed om ASIDES, a C-coded ime-do- main beha iou al simula o o SC CAMs [3]. As a consequence o his ansla ion, simula ion esul s ob ained wi h bo h SIMULINK and ASIDES a e p ac ically iden ical. Compa ed o ASIDES, he p oposed SIMULINK ZA-block lib a y o e s a iendly use in e ace and a g ea lexibili y o simula e an a bi- a y SC il e opology, specially bu no only, dedica ed o CAMs. Howe e , he e is a mino CPU- ime penal y due o he SIMULINK in e ace. Fo ins ance, a 65536-poin simula ion o he modula o in Fig.3(c) including he mos complex models o building blocks akes 2 seconds using ASIDES and 5 seconds us- ing he CAM-block lib a y. This CPU- ime inc eases up o 415 seconds i M- ile building blocks a e used - which means abou 2 o de s o magni ude slowe han he app oach in his pape . As an illus a ion, Fig.6 shows he pe o mance deg ada ion o he 2-I2mb modula o in Fig.3(c) caused by wo e o mechanisms: 0- -50 8 .z 2 -loo .z -150 -200 -250 m - -‘“I (1 23 0 24 (1.25 I1 26 0 27 F equency I Sampling F equency Figu e 5. E ec o non-linea se ling on SI BP-CAMS. . . . A - . IO io3 IO 10 IO’ -300 4 - lo’ F cq:c”cy (Hz) Figu e 6. Deg ada ion o an SC 2-1 2mb XAM wi h INL and A , . he In eg al Non-Linea i y (INL ) o he 3-bi DAC and he ini e DC gain o he opamps, A , . Bo h he isola ed and he combined e ec s o hese wo e o mechanisms on he ou pu spec um a e shown in Fig. 6 when he modula o is clocked a s = 35.2MHz o INL = 0.1 LSB and A, = 50dB. In his case, as he INL e o is shaped by he il e ing pe o med by p e ious s ages, he main deg ada ion is caused by A , basically inc easing he quan- iza ion noise powe in he signal band. CONCLUSIONS A comple e SIMULINK block lib a y in ended o as and in e - ac i e simula ion o SC, SI and CT ZAMs has been desc ibed. The beha iou al models o building blocks, including main ci cui pa - asi ics, ha e been inco po a ed as SIMULINK C-coded S- unc- ions. The combina ion o high accu acy, sho CPU- ime and in- e ope abili y o di e en ci cui models, make he block-lib a y in o a aluable ins umen o op imize he design o ZA ana- log- o-digi al con e e s using MATLAB. RE FEREN C E S G.G. E. Gielen and R.A. Ru enba : “Compu e -Aided Design o Ana- log and Mixed-Signal In eg a ed Ci cui s”, P oceedings o he IEEE, Vol. 88, pp. 1825-1852, Decembe 2000. V. F. Dias, V. Libe ali and F. Malobe i: “Design Tools o O e sam- pling Da a Con e e s: Needs and Solu ions”, Mic oelec onics Jou - nal, Vol. 23, pp. 641-650, 1992. F. Medei o, B. Pe ez-Ve db, and A. Rod iguez-Vhzquez: Top-Down Design o High-Pe b mance Modula o s, Kluwe Academic Publish- e s, 1999. K. F ancken, P. Vanco enland and G. Gielen: “DAISY: A Simula- ion-Based Hieh-Le el S n hesis Tool o AX Modula o s”. P oc. o/’ 2000 IEEE Ii e na ionA Con e ence on Compu e Aided Des& J. M. de la Rosa, B. PB ez-Ve du and A. Rod iguez-Vizquez: Sys em- (ICCAD), pp. 188-192. a ic Design o ’ CMOS Swi ched-Cu en Bandiass Sigma-Del a Mod- ula o s . o Digi al Communica ions Chips, Kluwe Academic Publishe , 2002. K. F ancken, M. Vogels, E. Ma ens and G. Gielen: “DAISY-CT: A High-Le el Simula ion Tool o Con inuous-Time AZ Modula o s”, P oc. o 2002 Design, Au oma ion and Tes in Eu ope Conje ence (DATE), pp. 11 IO. The Ma hwo ks Inc.: “Using MATLAB Ve sion 6.5”, 2002. The Ma hWo ks Inc.: “Using Simulink Ve sion 5”, 2002. S. B iga i, F. F ancesconi, P. Malco a i, D. Tonie o, A. Baschi o o and F. Malobe i: “Modeling Sigma-Del a Modula o Non-ideali ies in SIMULINK, P oc. o ’ 1999 IEEE In e na ional Symposium on Ci - cui s and S s ems IISCAS). DD. 11.384-387, [ 101The Ma hwo ks Inc.: ‘‘WijGig S-Func ions Ve sion 5”, 2002. [I I]J. A. Che y and W. M. Snelg o e: Con inuous-Time Del a-Sigma Modula o s , o High-speed A/D Con e sion: Theoiy, P ac ice and Fundamen al Pe o mance Limi s, Kluwe Academic Publishe s, 2000. IV-623