Random chopping in ΣΔ modulators

Random chopping in Σ∆ modulators Gildas L´ eger, Antonio Gines, Eduardo J. Peral´ ıas, and Adoraci´ on Rueda Instituto de Microlectr´ onica de Sevilla, Centro Nacional de Microelectr´ onica Consejo Superior de Investigaciones Cient´ ıficas (CSIC) and Universidad de Sevilla, 41092 Sevilla, Spain. Abstract—Σ∆ modulators make a clever use of oversampling and exhibit inherent monotonicity, high linearity and large dynamic range but a restricted frequency range. As a result Σ∆ modulators are often the preferred option for sensor and instrumentation. Offset and Flicker noise are usual concerns for this type of applications and one way to minimize their effects is to use a chopper in the front-end integrator of the modulator. Frequency-shaped random chopping has been proposed to minimize the impact of reference voltage interference. It is shown in this paper that the chopper signal is not the only term that modulates the offset and Flicker noise and that unwanted crosstalk can significantly degrade the performance of the modulator. I. INTRODUCTION Analog to Digital Converters based on Σ∆ modulation are dominating the market of high-resolution and low-to- medium frequency range applications. A large part of the conversion is handled by the digital decimation filter while the analog part (the Σ∆ modulator) is relatively small. Moreover these converters are inherently monotonous and usually exhibit high linearity. Despite the relative simplicity and robustness of the analog blocks, the trend toward higher performance has pushed Σ∆ modulators to their limits. At a resolution of 24bits, which is commercially available, any source of noise becomes a concern. This is particularly true at low frequency, where flicker noise can become a limiting factor. For sensor applications where calibration is not possible, the main concerns when using a Σ∆ converter may be gain and offset errors. There are two main techniques that can be used to reduce offset and flicker noise. These are correlated double sampling (CDS) and chopping [1]. Beyond offset and flicker noise suppression, CDS technique based on Nagaraj’s integrator [2], [3] has the advantage of relaxing amplifier DC gain requirements. In [4] an analysis of the noise contribution of the integrator is performed, which shows that the input capacitance of the amplifier should be minimized to effectively cancel Flicker noise contribution. Despite the important benefits of this integrator structure, its use in Σ∆ modulators is not generalized, maybe because it requires specific and careful design. On the other hand, chopping seems – at first sight – a much more straightforward approach. Apparently, it can be included in an existing integrator design with little effort. As a matter of fact, the papers describing modulators that include chopping seldom detail chopper implementation and its possible impact on performance [5]–[7]. Neither do reference textbooks [8], [9] or studies on non-ideality modeling [10], [11]. In [8], it is commented that the presence of signals at half the sampling frequency (fs/2) can lead to performance degradation if these signals couple to the reference voltages. Indeed, in such a case, a tone at half the sampling frequency would demodulate the quantization noise into the base-band. Operating the chopper at half the sampling frequency may thus not be the best option. To circumvent this issue, it is proposed in [12] to use a random chopper signal with a bandpass shape. In this way, the offset and flicker noise power should spread over the frequency range. With the zero at DC, their contributions to the baseband should be negligible. With a zero at half the sampling frequency, the amount of quantization noise demodulated into the baseband due to reference coupling should be greatly reduced. In this paper we show that the action of the random chopper does not depend on the shape of the chopper signal alone. Furthermore, we show that any capacitive coupling between the amplifier input and output nodes could have not negligible effects, and as consequence chopper implementations should be realized with special layout care. Otherwise, the unwanted effects of random chopper could be worse than the quantization noise demodulation induced by the coupling of a chopper at fs/2on the voltage references. The paper is organized as follows. Section 2 is devoted to the study of the random chopper effect on offset and Flicker noise. Section 3 demonstrates how a small parasitic can lead to quantization noise leakage into the baseband. Finally Section 4 summarizes the paper conclusions. II. THE CHOPPER OPERATION The most direct chopper implementation that can be found in the literature consists in adding crossed switches in series at the amplifier inputs and outputs, as illustrated in Fig.1-a. In that way, the noise and offset introduced by the amplifier are modulated by the chopper signal. Another implementation of chopper, represented in Fig.1-b, consists in a flip-flop of the integrating capacitors, which requires to apply the chopper to the integrator inputs. The first order results are identical to those of the first implementation. The main difference between the two schemes actually lies in the amplifier settling requirements, which are not the object of our study. The chopper transitions occur in the interphase between φ1and φ2 as shown in Fig.1-c. Analyzing a classical integrator without chopping (consider φc= 1 and φd= 0 in Fig.1-a), the contribution of the amplifier offset to the integrator output VU 1d 2d 1 2 d c C1 C2 VX+ 2 C1 1 2d 1d d c C2 d c d c 11d c , A VY+ VYVX- VU+ VU- 22d 2d A 1 2 C1 C2 2d B 1d A 1d B 1d A 1d B 2d B 2d A 1 2 A B B A A B B A C1 C2 VU+ VUVX+ VY+ VYVX- d , B a) b) c) VU -A x (VI -Voff) VI -A x (VI -Voff) VI VU Fig. 1. a) Diagram of a single-branch integrator with a chopped amplifier. b) Diagram of a chopped integrator, where the chopping is implemented on the feedback capacitors and the integrator input. c) Integrator clock phases IN CH U 1 z 1 1 1 z A b  b OFF b 2 5.0 CT OFFCH OFFCT  Fig. 2. High level model of a chopped integrator for event-driven simulators can be calculated as, VU≈b1−b+1 Az−1(Vin +Voff ) 1−z−11−b A(1) Vin =VX−VY where b=C1/C2and Ais the amplifier DC gain, which is considered high enough to allow Taylor series expansion of terms in 1/A. The principle of operation of the chopper is so simple that exact calculation is often overlooked. It is usually considered that the amplifier offset (and 1/f noise) is only multiplied by the chopping sequence. The offset term Voff in (1) is replaced by Vc off which is the offset modulated by the chopper signal. This modulation removes the offset contribution at DC. However, this is not the complete picture. Let us consider a chopper transition, in other words a rising or a falling edge of the chopper signal. During a chopper transition, phase φ2is low and the connection to the sampling capacitors is thus open. The two architectures represented in Fig.1 reduce to the same case study with respect to chopping effects if we neglect settling and charge injection mechanisms in the switches. Writing charge conservation at the amplifier input nodes, the output voltage for a chopper transition is, V∗ U=VU+2Vc off 1+1/A ≈VU+ 2Vc off (2) If the amplifier has no offset, it is perfectly symmetrical and the flip operation has no effect on the integrator output. However, the presence of an offset imbalances the virtual grounds, and the charge required to recover the equilibrium (which has to be drawn from the feedback capacitor C2) modifies the integrator output, but only when the chopper signal undergoes a transition. We can thus say that, apart from the usually considered chopper-modulated term, the integrator output also contains a term that depends on the chopper transitions which modifies the modulation. The chopper action on the amplifier offset (and flicker noise) should thus be modeled as shown in Fig.2. The white part corresponds to the straightforward chopped integrator model while the shadowed part includes the contribution that depends on the chopper transitions. The blocks in dashed lines correspond to parasitic effects that will be discussed further. We note the time-domain signals in lowercase and their z-transforms in uppercase. The chopper signal, ch(n), has logical values: 1and −1. The chopper transition signal, ct(n), is equal to 1 for the sample immediately following a chopper rising or falling edge, and 0 elsewhere. This signal can be built from the chopper signal ch by taking, ct(n) = (1 −ch(n)ch(n−1)) /2(3) where the product between ch(n)and ch(n−1) takes the value −1when the chopper and its delayed version are different (i.e. when it exhibits a transition) and 1when they are identical. Obviously, this signal is quite different from the chopper (ch) and it is legitimate to wonder what will be its effect on the offset in the modulator output spectrum. It is important to remark in Fig.2, though, that the chopper transition contribution to the offset (offct) is multiplied by both the chopper signal and the chopper transition signal in the form, offct (n)=2off (n)×ch (n)×ct (n)(4) m OFFCT (z)=2OFF (z)∗CH (z)∗CT (z) For the sake of simplicity, we consider both flicker noise and offset in the term off, herein a time-varying signal. However, most of flicker noise power is concentrated at low frequency and we can thus consider its z-domain transform OF F(z)as narrowband. While the spectrum of the chopper transition signal is not known a-priori, it is deterministically linked through (3) to 1 z 1-bit pseudorandom sequence 1 z Chopper signal Fig. 3. Simple digital scheme for the generation of a bandpass pseudorandom sequence the chopper signal and this introduces a direct simplification. Because ch(n)is a square signal between 1and −1, we have ch(n)2= 1, which leads to, offct = 2off (n)×ch (n)×ct (n)(5) offct =off (n)×(ch (n)−ch (n−1)) m OFFCT =OFF (z)∗1−z−1CH (z) Hence, taking into account the integrator gain b, the total chopped offset and flicker noise contribution can be considered as an additive perturbation on an offset and flicker-free integrator. Referring this perturbation, OFFchop, to the integrator input it comes, OFFchop (z) = 1 b(OFFCH (z) + OFFCT (z)) (6) OFFchop (z) = OFF (z)∗1 + b−z−1 bCH (z) In Fig.1-c, the chopping signal is represented as a clock at fs/2(being fsthe sampling frequency), but the only condition on the signal is that the 1 and 0 states should last an entire number of φ1(and thus φ2) periods. In that sense, [12] proposes to use a frequency-shaped random signal, in order to spread the offset and flicker noise in the same way as a Σ∆ modulator shapes quantization noise. A pass-band shape is proposed with a notch at DC and fs/2(half the sampling frequency). The zero at DC should minimize the offset and flicker contribution in the base-band while the zero at fs/2 is aimed at minimizing the coupling of high-frequency tones to the voltage references. The random chopper signal can be generated using simple digital blocks as shown in Fig.3 (the 1-bit pseudo-random sequence can be generated by a Linear- Feedback Shift Register). In order to see the impact of the chopper transition signal, we generate such a sequence in Matlab and use it in the model shown in Fig.2. We consider an integrator with a gain of b= 1/2. Fig.4 shows the chopped-offset spectrum. For this figure the power spectrum has been referred to the input offset so attenuation due to chopper can be evaluated with respect to the 0dB level. Together with the overall result (the thick line), we have represented the classical contribution (i.e. the spectrum of the chopper signal, with square markers) and the chopper transition contribution (with round markers). The shaping effect on the latter can clearly be appreciated. At low frequency, the classical chopper-only contribution dominates the noise spectrum but at high frequency, the chopper transition contribution significantly increases the noise power level. In particular, the power density at fs/2results to be 10-3 10-2 10-1 -120 -100 -80 -60 -40 -20 0 normalized frequency chopped offset power spectrum chopper transitions contribution chopper contribution overall chopper Fig. 4. Effect of chopper transitions on the spectrum of the chopped offset referred at the integrator input. The chopper is a pseudo-random sequence shaped as defined in [12]. 10-3 10-2 10-1 -50 -40 -30 -20 -10 normalized frequency power spectrum (in dBFS) overall chopper input flicker chopper contribution chopper transitions contribution Fig. 5. Effect of chopper transitions on the spectrum of the chopped flicker noise referred at the integrator input. The chopper is a pseudo-random sequence shaped as defined in [12]. 14dB higher than expected from the chopper-only model. This is coherent with (6): at z=−1we find a factor 5 (i.e. 13.97dB) increase with respect to chopper-only contribution, for an integrator gain b= 1/2. If flicker noise is the main concern, the signal OF F (z) in (6) cannot be considered as a scalar. Actually, its power spectral density is of the form, SOF F ∝1/f (7) and the convolution in (6) is not so straightforward. Fig.5 shows the chopped-flicker spectrum referred to the integrator input. The power spectrum of the flicker noise without chopper is also represented in order to illustrate the benefits of chopping. It can be seen how chopping effectively brings a reduction of flicker noise power at low frequency. The notch at DC and fs/2that could be seen in Fig.4 for a DC offset is significantly filled by flicker noise aliasing, as could be expected. In significant contrast to the DC offset case, it can be seen that the chopper transition contribution dominates over the classical chopper contribution over the entire spectrum and not only at high frequency. In particular the power spectral density of the overall chopped flicker noise is close to 10dB higher than what could be expected with a simple model at low frequencies. This increment is significant and should thus be taken into account during the design phase. III. SENSITIVE CHOPPER PARASITIC COUPLING In a Σ∆ modulator, the modulator output is fed back (and subtracted) to the input through a DAC. The principle of operation of the feedback DAC is very simple. For a singlebit quantizer, if the modulator output is 1 the feedback DAC connects the integrator to the positive reference voltage +Vref and if it is 0, it connects the integrator to the negative reference voltage −Vref . It appears that the DAC multiplies the digital output by the reference voltage. If this reference voltage is constant, the DAC performs the intended operation. However, if any interference couples onto the reference voltage, it will modulate the feedback signal (i.e. the modulator output). This perturbation – that can be referred directly to the modulator input – will spread over the entire frequency band. The output spectrum of a Σ∆ modulator is likely to contain high power tones at high frequencies. This is particularly true for modulators using single-bit quantizers and for DC inputs. As a result, if the interference is a tone at (or close to) fs/2, it will demodulate the high-frequency part of the quantization noise back into the modulator base-band leading to spurious tones. This is the reason why bandpass random chopper is introduced in [12]: if the chopper signal couples to the reference voltages, the zero introduced at fs/2should minimize the demodulation of high-power tones into the baseband. We will show in this section how another parasitic coupling can lead to severe performance degradation when the chopper is activated. The chopper layout should thus be realized with care to avoid that the remedy be worse than the initial problem. The chopper transitions can affect the signal transfer function if parasitic capacitances are present at the amplifier input and output nodes. Indeed, these capacitances charge and discharge the feedback capacitors when a chopper transition occurs. In Fig.6, we have represented the parasitic capacitors that can affect the integrator operation during a chopper transition: an input capacitor Cpi, an output capacitor Cpo, a positive feedback capacitor Cpp and a negative feedback capacitor Cpn. For these last two capacitors, we consider a differential contribution for the sake of simplicity. Indeed, if the parasitic occurs on a single branch it will affect both the common-mode and the differential signal. The differential contribution in this case can be calculated taking one half of the capacitor value. Writing charge transfers at nodes A and B, the output voltage for a chopper transition V∗ Uis, V∗ U=h1 + Cpp−Cpn C2+1 A1−Cpp+Cpn+Cpi C2iVU−2Vc off 1−Cpp−Cpn C2+1 A1−Cpp+Cpn+Cpi C2(8) d c C2 d c d c d c Cpn Cpi Cpo Cpn Cpp C2 Cpp A B + - -A x VIN VI VU VU+ VU- Fig. 6. Parasitic capacitors on the amplifier. As we consider only completely settled charge transfer, it is obvious that the output capacitor Cpo has no effect, being connected to a voltage source. We can remark that there is a term involving parasitic feedback capacitance that is not divided by the DC gain. If we consider that the amplifier DC gain is large and that the parasitic capacitances are small with respect to C2, a first order approximation of (8) gives, V∗ U≈(1 + δ)VU−(2 + δ)Vc off (9) δ= 2Cpp −Cpn C2 Hence, each time that the chopper produces a transition, the integrator output voltage will be proportionally increased or decreased (depending on the value of Cpp and Cpn). It can be seen that the parasitic parameter δalso modifies the gain of the offset contribution, but this is a small quantitative change that can be obviated. The simulation results obtained for the model proposed in Fig.2 still hold. This chopperstabilized integrator model can be complemented considering the new modulation effect described in (9) which corresponds to the dashed-line blocks shown in Fig.2. If the parasitic capacitances are sufficiently small, their contribution can be seen as a perturbation and referred to the modulator output. In that way, we can evaluate the impact on performance by looking at the components of this perturbation that lay in the modulator baseband. A generic Σ∆ modulator is usually described at high level by its Signal Transfer Function (STF) and its Noise Transfer Function (NTF), that relate the output bit-stream Yto the input signal Xand the quantizer noise E, respectively, as follows, Y=STF (z)X+NTF (z)E(10) In (4) we have defined CH(z)as the z-transform of the chopping signal and CT(z)as the z-transform of the chopper transition signal. Let U1(z)be the z-transform of the first integrator output and TI(z)be the transfer function from the first integrator input to the modulator output. This transfer function can be calculated by summing a virtual signal – let us name it Ivirtual – at the first integrator input. This virtual signal would appear at the modulator output as, Y=STF (z)X+NTF (z)E+TI (z)Ivirtual (11) In the general case, the contribution of the perturbation to the modulator output can be written as, Pert (z) = δ b×TI (z)×[CT (z)∗U1(z)] (12) For a given architecure, that is to say for a particular loop filter, U1(z)and TI(z)can be explicitly calculated and the perturbation is written as a function of the input signal X, the quantization error Eand the known but not calculated chopper transition signal CT(z). In most cases of the CIFB structure (Cascade of Integrators with FeedBack) described in [9] – which is a widely used architecture – the modulator input signal feedforward coefficients are all set to 0 except the first one. As a consequence, a perturbation at the integrator input is equivalent to a perturbation at the modulator input and thus sees the modulator TI(z) = STF(z). Furthermore, for this architecture the integrator input is the input signal minus the output bit-stream. Taking (10) into account, it can be written, U1(z) = bz−1 1−z−1((1 −STF (z)) X−NTF (z)E)(13) If we assume that the modulator architecture implements an ideal Lth order modulator such that, STF (z) = z−L(14) NTF (z) = 1−z−1L it comes, Pert =δz−L×"CT ∗ L−1 X i=0 z−i!X!# (15) −δz−L×hCT ∗z−11−z−1L−1Ei From this equation, it can be seen that the perturbation has a signal-dependent contribution and a noise-dependent contribution. If the modulator Over-Sampling Ratio (OSR) is higher than the modulator order (L) – which occurs in a large majority of cases – the sum on Lsamples that is performed on the input signal can be approximated to a gain factor L. As was said above, for any particular architecture TI(z)and U1(z)are easily calculated, but the trend will be similar: a signal and a noise contribution modulated by the chopper transition signal CT. The spectrum of this signal is particularly relevant to understand the impact of the chopper parasitics. The chopper transition signal is not the chopper signal, and the shape of their spectra may be quite different. This is illustrated in Fig.7, which shows the power spectrum of the chopper signal (CH) proposed in [12] together with the corresponding chopper transition signal (CT ). It can be seen that the chopper transition signal has a spectrum that is almost flat, excepting a significant DC component and a tone at fs/2. 10-4 10-3 10-2 10-1 -100 -80 -60 -40 -20 normalized frequency power spectrum (in dBFS) CH CT Fig. 7. Power spectra of the chopper signal (CH) proposed in [12], and of its associated chopper transition signal (CT). Because the first integrator output is not correlated to the chopper transition signal (at least in first order), we can expect that the perturbation spectrum will have three contributions. First, the convolution with the DC component will lead to a scaled replica of the integrator output. For an ideal CIFB modulator, the integrator output is shaped at an order lower than the overall modulator. The impact of this contribution is thus similar to integrator leakage. Second, the convolution by the tone at fs/2will lead to an alias of the integrator output. This is exactly the kind of noise aliasing that would be obtained if a tone at fs/2coupled to the reference voltages. Such a noise aliasing is what was meant to be avoided by the introduction of bandpas random chopping. And third, the convolution with the flat noise will lead to a flat noise. This can be verified in Fig.8. We simulated a 10ms transient of a third order 2-1 Σ∆ modulator – like the one described in [13] but with a chopped amplifier in the first integrator – for a half-scale sinewave input. The frequency-shaped random chopper was generated as proposed in [12] by a Verilog block taking a 10bit LFSR as a random input sequence. The rest of the modulator was simulated at transistor level. Two simulations were performed: one without any parasitic feedback capacitor and another with a 100fF parasitic capacitor leading to δ= 0.12. Such a high value was chosen in order to visualize the effects easily on the output spectrum, without having to simulate a long transient. The thick line corresponds to the output spectrum of the modulator with the parasitic capacitor. The output spectrum of the modulator without the parasitic is also represented (with circle markers), as well as the spectrum of the perturbation (with square markers). This perturbation was computed according to (12) taking the signals U1and CT from the electrical simulation. It can be seen how the perturbation is almost flat, showing that the convolution with the flat noise is the dominating component. Moreover, it almost perfectly matches the modulator output spectrum in the baseband, which demonstrates that it is the cause of the performance degradation, as expected. 10-4 10-3 10-2 10-1 -120 -100 -80 -60 -40 -20 0 20 normalized frequency power in dBFS output with parasitic without parasictic perturbation due to parasitic Fig. 8. Power spectra of a 3rd order modulator output, with and without feedback parasitic capacitor. The spectrum of the perturbation signal is also represented. 10-6 10-5 10-4 10-3 10 12 14 16 18 20 parasitic parameter ENOB Fig. 9. ENOB versus parasitic parameter, at an OSR of 50, for a single-loop single-bit 4thorder Σ∆ modulator with the random chopper proposed in [12]. The exact architecture implemented in [12] is not detailed, but we know it is a 4th order modulator that is supposed to reach a 20bit resolution. If we consider an ideal modulator transfer function and a single-bit quantizer, it comes that the oversampling ratio should be 50 to reach a 20 bit resolution. Assuming a CIFB implementation, the perturbation as expressed in (15) can be numerically simulated for any input signal, taking the classical approximation that Eis a white noise of variance, σ2 E=FS2/12 (16) where FS is the modulator full-scale. In this way, we can evaluate the expected Effective Number of Bits of the modulator versus the parasitic parameter δ. Fig.9, which has been generated for a half-scale input sine-wave shows that the resolution is decreased by 3bits for δ= 10−5. If the feedback capacitance is in the order of 10pF, this means that the parasitic capacitances between the amplifier input and output nodes should be maintained well below 0.05fF to avoid significant performance degradation. A simple metal crossing or line coupling in a bus could easily lead to such capacitances. IV. CONCLUSION It has been shown in this paper that the introduction of a random chopper in the first integrator of a Σ∆ modulator effectively modulates the amplifier offset and Flicker noise out of the base-band but these contributions are not simply modulated by the chopper signal but also by a signal that depends on the chopper transitions. This must be taken into account to meet precision requirements, in particular for Flicker noise which residual power was shown to be 10dB higher than expected. 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