Behavioral modeling of PWL analog circuits using symbolic analysis

Behavioral Modeling of PVVL Analog Circuits using Symbolic Analysis Francisco V Ferndndez, Bel& Pe'rez-Verdu' and Angel Rodriguez-Vdzquez Instituto de Microelectrdnica de Sevilla Centro Nacional de Microelectr6nica-C.S.I.C. Edificio CICA-CNM, Avda. Reina Mercedes sln, 41 0 12-Sevilla, SPAIN FAX:: 34 5 4231832 Phone: 34 5 4239923 email: [email protected] ABSTRACT^ Behavioral models are used both for top-down design and for bottom-up verification. During top-down design, models are created that reflect the nominal behavior of the different analog functions, as well as the constraints imposed by the parasitics. In this scerlario, the availability of symbolic modeling expressions enable designers to get insight on the circuits, and reduces the computational cost of design space exploration. During bottom-up verification, models are created that capture the topological and constitutive equations of the underlying devices idto behavioral descriptions. In this scenario symbolic analykis is useful because it enables to automatically obtain thesi descriptions in the form of equations. This paper includes an example to illustrate the use of symbolic analysis for top-down design. 1. INTRODUCTION Circuit analysis is the cornerstone for electronic circuit engineering. On the on1 hand, it provides the keys to understanding the intricate mechanisms underneath the circuit operation. On the other^ hand, designers use analysis to obtain models of the circuit lbehavior - the basis on which this behavior can be predicded. However, manual analysis of even the simplest circuits kncountered in practical applications is a complicated, time-consuming, and error-prone task. Symbolic analyzers are intended to relieve designers of systematic manual analysis thsks, thus letting them concentrate on creative issues. I The last generatio? symbolic analyzers are able to handle up to around 400 diffbrent symbols [ 11. This permits, for example, to analyze dircuits as complex as the rail-to-rail CMOS opamp of Fig!l(a) 121 with the small-signal transistor model of Fig. l(b) [3]1-[5]. The analyzers capabilities include the calculation of s-dbmain expressions for all types of driving-point and transfer characteristics, the simplification of these expressions to retain only the dominant terms, the extraction of their poles^ and zeroes, etc. Recently, different authors have focused also on the symthose weak nonlinear- I bolic analysis of no circuits [6][7]. The most impor- a few terms (typically 1. This work has been pattially supported by the Spanish C.I.C.Y.T. under contract TIC97-0580 ind the EEC in the project ESPRIT AMADEUS. I I I I B Figure 1. (a) Rail-to-rail opamp; (b) small-signal MOS transistor model. 3) of a power series expansion. In [6] systematic techniques are proposed for the automatic calculation of the Volterra kernels [8] that characterize the behavior of these weaklynonlinear circuits in the frequency domain. However, the symbolic analysis of hardly-nonlinear circuits is yet in exploratory phase 171. To date, no systematic technique is available to automate the calculation of a set of symbolic equations governing the large signal nonlinear behavior, either in the static or in the dynamic case. This lack of nonlinear analysis limits the modeling capabilities of state-of-the-art symbolic analyzers. However, in many practical applications these limitations can be overcome by resorting to piecewise-linear (PWL) representations. For instance, these representations suffice to study the qualitative behavior of many practical dynamical circuits such as oscillators and comparators, as well as to approximate the transient response of opamps and comparators. VI- 17 0~7803-4455-3/98/%10.~0 0 1998 lEEE 2. BEHAVIORAL MODELING A behavioral model is a set of equations that capture the operation of a circuit from its terminals. Behavioral models can also be given as circuital representations of these equations. Depending on the nature on the excitations and responses, the set of equations and its associated circuital representation can be static or dynamic, linear or nonlinear. For example, Fig.2 shows different behavioral models for an opamp. The first one is static and the others dynamic; the first two are linear and the others nonlinear. Circuital representations are included for each model. The construction of a behavioral model does not strictly require to know the detailed circuit schematic. Neither the model circuital representation must reflect the circuit topology. Models can be built by, first, applying a suitable set of excitation-response pairs and, then, finding and tuning a math structure that reproduce these pairs within some prescribed error margin. Consider for example the OTA shown in Fig.3(a) and assume that we are interested only in its linear AC behavior. This can be modeled by h -parameters, which can be experimentally calculated in the lab by using a network analyzer in the configurations of Fig.3(c). Alternatively, behavioral models can be constructed through the electrical analysis of the internal circuit schematic. For instance, assuming that the OTA schematic of Avdd . Figure 3. (a) Simple OTA; (b) simplified small-signal MOS transistor model; (c) black box modeling procedure for a two-port. Fig.3(b) and the transistor model of Fig.3(c), a last generation symbolic analyzer such as SYMBA [9] would return the following h -parameter approximated expressions, hi(s) = "b - + - gm3(gml+ gm2) 2 - - scg.~2gm1gm3 Cgs2[gml(Cgs3 'gs4) + gm3Cgsl] s[gm3(cgsl + 'gs2) + (gml + gm2)(Cgs3 + Cg.vdI sCgs2gmlgm3 +S Cgs2[gml(cgs3 + Cg34) + gm3CgslI h,fW = + 2 + n-; + FVO Vi-+ vu VIP '"b - gdslgm3 +sgd.~l(Cg.sl + cgs3 + Cg.J gmlgml+ S[gml(Cg.v3 + Cgs4) + gm3Cgsll gds2 gm1 +sCgsl gds1gm3 + Sgdsl(Cgs1 + cgs3 + Cgs4) gmlgm3 +s[gin1(cgs3 + cg.~4) +~m3Cg.v1] - - - h,(s) = Vi-+ ,+ vi; h,(s) = (1) In practice, designers use their experience to build modular models, where functional substructures are used to represent the nominal circuit behavior as well as the parasitics. Thus, for example, Fig.2(a) captures the nominal opamp be- - - Figure 2. Opamp behavioral models. VI- 18 havior; that of Fig.2 to the dynamics ass1 and Fig.2(c) models ty. These three mod< other hand, Fig.2(d) ing-point behaviors The different funr havioral model can surements or throug the case of PWL mc nonlinear substructu ed through their syi presented in the sec interest of these PW 3. A PWL MOD OPA Consider the SC opamp represented I transient observed ii the integrating capac part. The linear part gml( V,(S) = - C,(C VJS) = - where, yc = cic2. yielding, where the coefficiei parameters [lo]. Th lowing condition is 1) includes a first-order approximation :iated to any voltage gain mechanism; ie first stage transconductor nonlineari- ; focus on the transfer behavior, On the iptures also to a first approach the drivthe circuit terminals. onal substructures pertaining to a be- e tuned either through blackbox meaanalysis of the underlying circuit. In els, measurements are used to tune the s while those linear ones are representbolic transfer functions. The example )n below illustrates about the practical models. L FOR TOP-DOWN TRANSIENT [P OOPTIMIZATION itegrator of Fig.4(a) and assume the the PWL model of Fig.4(b) [lo]. The the transferring of the input voltage to or contains a linear part an a nonlinear in be calculated symbolically from, ric, + C2C, + c2c, + c,c, , = ci + c, + c, (3) cp(-at)cos@t + C,, exp(-at)sinpt up(-at)cospt + Cllexp(-at)sinpt (4) cp(-at)cospt + CUI exp(-at)sinpt s are given as functions of the model e equations remain valid while the fol- Hilled, 8mzIv* (q I, (5) VI- 19 Figure 4. (a) SC integrator and, (b) opamp model. Afterwards, the second model stage enters into saturation and the transient is described by the following equations, where. and the remaining coefficients are given as functions of the model parameters [ 101. This second transient persists while the condition (5) holds. Afterwards, the transient is given by, yielding, v,(t) = A,, +B,,exp(-at)cospt+ C,,exp(-at)sinpt (10) where the coefficients are, as in the previous expressions, given as functions of the model parameters. The model has been validated by comparing its output waveform to that of obtained through detailed electrical simulation. The amplifier consisted of a fully-differential folded-cascode OTA whose core schematic and summarized performance are given in Fig.5. Said amplifier was designed to have small phase margin (around 4Sdeg) to reduce power dissipation. Fig.6(a) shows the integrator output voltage during the integration phase obtained through electrical simulation (HSPICE) and that obtained using the model. Model parameters are also enclosed in Fig5 A good concordance between both approximations is observed. A more general result is given in Fig.6(b) where the difference between the final value of the integrator output voltage and its ideal value is shown as a function of the input level. V- --I GBW(3.2pF) = 106.7MHz PM (3.2pF) = 42.2O I, = 500pA Figure 5. Fully differential OTA. 0.4 r . . 1 0.3 2 0.2 2 0.1 2 0.0 c c 0 0) +- -0.1 -0.2 - -0.40 5.0e-09 1 .Oe-08 13-08 2.0e-08 2.5e-08 Time (s) (4 - HSPICE 1 --Model 0.5 1 .o 1.5 2.0 -0.1 ‘0 Voltage stored in Ci (V) Figure 6. Simulated and calculated responses. (b) 4. REFERENCES 11 F.V. Fernsindez, A. Rodriguez-Vsizquez, J.L. Huertas and G. Gielen, eds., Symbolic Analysis Techniques. Applications to Analog Design Automation. IEEE Press, 1998. 21 W.S. Wu, W. Helms, J.A. Kuhn and B.E. Byrkett, “Digital-compatible high-performance operational amplifier with rail-to-rail input and output ranges,” IEEE J. Solid-state Circuits, Vol. 29, pp. 63-66, Jan. 1994. [3] P. Wambacq, EV. Fernsindez, G. Gielen, W. Sansen and A. Rodriguez-VBzquez, “Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits,” IEEE J. Solid-state Circuits, Vol. 30, pp. 327-330, March 1995. [4] Q. Yu and C. Sechen, “A unified approach to the approximate symbolic analysis of large analog integrated circuits,” IEEE Trans. Circuits and Systems I, Vol. 43, No. [5] F.V. Fernsindez, 0. Guerra, J.D. Garcia and A. Rodriguez-VBzquez, “Symbolic analysis of analog integrated circuits: the numerical reference generation problem,” IEEE Trans. Circuits and Systems, 1998, to appear. [6] P. Wambacq, Symbolic Analysis of Large and Weakly Nonlinear Analog Integrated Circuits. Ph.D. Dissertation, Katholieke Universiteit Leuven, Belgium, 1996. [7] C. Borchers, L. Hedrich and E. Barke, “Equation-based model generation for nonlinear analog circuits,” Proc. 33rd Design Automation Con$, pp. 236-239, 1996. [8] S. A. Maas, Nonlinear Microwave Circuits, Artech House 1988. [9] IMSE-CNM, Methods for SBG and SDG. ESPRIT Project 21812 AMADEUS, Internal Report, March 1997. [ 101 E Medeiro, XA-modulator Inte~aces for Mixed-Signal CMOS IC’s: Modeling, Simulation and Automated Design. Ph.D. dissertation, University of Sevilla, Spain, 1997. 8, pp. 656-669, Aug. 1996. VI-20