CMOS optical-sensor array with high output current levels and automatic signal-range centring

a e o wi hin one node (decade) in 53% o he aul s, wi h 100% accu acy o only 33% o he aul s. Howe e , o some ansis o s bo h esis ance and loca ion we e plo ed o high accu acy. The ela i e inaccu acy o he esis ance alues is due o he ollowing: (i) ela i ely la ge di e ences in esis ance some imes esul in neg- ligible changes in supply cu en (ii) inc easing esis ance some imes esul s in non-mono onic changes in supply cu en (iii) wo o mo e o he Euclidean dis ances may be compa able esul ing in iden i ica ion o he w ong winne du ing es ing. The p oposed me hod is shown in Fig. 2. supply cu en ID^, mul iloye oully onsis o ldenli ied ony o nbiguily yes Kohonen ne o sol e ombiguily an~is o I iden i y O aul y oul1 ’ o decla e I aul - ee I Fig. 2 P oposed diagnos ic me hod ind loco ion and esis once o gale oxide sho in he In e pola ed supe ised o ced o ganisa ion map, ISFOM: Inspec- ion o he weigh s o he in e media e nodes o he SFOM showed hem o be in e media e in alue be ween hose o he ained nodes. I was he e o e possible o eplace he ela i ely leng hy p ocedu e o aining all he ou pu nodes by in e pola ing he known weigh s o he aining nodes o ob ain he weigh s o he in e media e nodes. This conside ably speeded up he aining o he map. The esul s o he esis ance alues ob ained we e he same as o he SFOM bu he loca ion alues we e a li le less accu a e a 89% accu acy o 82% o he aul s. Conclusions: (i) 100% accu a e aul y ansis o diagnosis in a CMOS opamp wi h ga e oxide sho s is possible by pa e n ecogni ion o he supply cu en esponse o a amp inpu signal in a wo-s age p ocess using i s mul ilaye pe cep ons and secondly a Kohonen unsupe ised sel -o ganising map. (ii) Gi en sui able da a, a supe ised o ced o ganisa ion map (SFOM) can be de eloped in which wo pa ame e s may be plo - ed agains each o he in he ou pu map. (iii) Ex ension o an SFOM o an in e pola ed SFOM (ISFOM) is possible in which aining is a oided by calcula ing he weigh s o he in e media e nodes. (i ) I is possible o use he ou pu map o an SFOM o ISFOM o plo aul loca ion agains aul esis ance o iden i y ga e oxide sho s in MOSFETs in a CMOS opamp by ecognising he supply cu en esponses o amp es s imuli. ( ) The aul loca ions may be de e mined mo e accu a ely han hei esis ances, e.g. 89% accu acy and one decade accu acy, espec i ely. In some ansis o s, howe e , bo h may be measu ed o high accu acy. ( i) SFOMs equi e an o de -o -magni ude less aining ime han Kohonen maps, while ISFOMs equi e no aining and may be e en mo e quickly de eloped. 0 IEE 1994 Elec onics Le e s Online No; 19941281 P. Collins, S. Yu and B. W. Je is (School o Enginee ing In o ma ion Technology, She ield Hallam Uni e si y, Ci y Campus, Pond S ee , She ield SI I WB, Uni ed Kingdom) K. R. Ecke sall, I. M. Bell and G. E. Taylo (VLSI Design & Tes G oup. School o Enginee ing and Compu ing, Uni e si y o Hull. Co ingham Road, Hull HU6 7RX. Uni ed Kingdom) Re e ences 1 YU, s., JERVIS, B.w., ECKERSALL. K.R., BELL, I.M., HALL.A.G., and TAYLOR, G.E.: ‘Neu al ne wo k app oach o aul diagnosis in CMOS opamps wi h ga e oxide sho aul s’, Elec on. Le ., 1994, 30, (9), pp. 695-696 2 KOHONEN, T.: ‘The sel -o ganising map’, P oc. IEEE, 1990, 78, (9), pp. 14W1480 14 Sep embe 1994 CMOS op ical-senso a ay wi h high ou pu cu en le els and au oma ic signal- ange cen ing S. Espejo, R. Dominguez-Cas o, R. Ca mona and A. Rod iguez-Vizquez Indexing e ms: CMOS in eg a ed ci cui s, Pho ode ec o s. Image senso s A CMOS compa ible pho osenso wi h high ou pu cu en le els, and an a ea-e icien scheme o au oma ic signal- ange cen ing acco ding o illumina ion condi ions a e p esen ed. The high ou pu cu en le els allow he use o hese de ices in con inuous- ime asynch onous image s, as well as in high-sampling- equency applica ions. In oduc ion: Ligh ansduc ion is equi ed o elec onic image- eco ding and moni o ing [I]. I is also a basic ea u e o he eme ging class o highly-pa allel image-p ocessing elec onic sys- ems, wi h po en ial applica ion in a i icial neu o- ision, pa e n ecogni ion, ale and con ol, e c. [2, 31. Fo hese la e applica- ions, CMOS image s enable he ealisa ion o pa allel-p ocessing ision chips in he s anda d and cheapes VLSI echnologies. Con en ional CMOS image s use e e se-biased diodes as ligh - con olled cu en sou ces o discha ge p e iously cha ged capaci- o s du ing a p esc ibed ime in e al [l]. This Le e p oposes he use o wo o mo e e ical BJTs in a Da ling on con igu a ion as pho oac i e de ices. These pho osenso s, which seem o be espe- cially adequa e o bina y images, exhibi a la ge ou pu -cu en o de ice-a ea a io, allowing hei use in con inuous- ime applica- ions. Typical image s consis o a wo-dimensional senso a ay, which encodes he inpu image in o a ma ix o elec ical alues (pixels). Fo any gi en scene, he a e age pixel alue is a s ong unc ion o he en i onmen luminosi y. Fo his eason, mechani- cal and/o elec ical adap a ion a e equi ed o adjus he sensi i - i y o he image . This Le e p oposes a eal- ime collec i e compu a ion ci cui o ep esen he image by he de ia ion o he indi idual pixels wi h espec o hei mean alue. The p oposed pho osenso s and signal-cen ing ci cui y ha e been es ed on a 15p n-well CMOS p ocess. Da ling on pho osenso : Fig. la illus a es a c oss-sec ion o a CMOS pho odiode. The e e se cu en I, in he diode is app oxi- ma ely gi en by [4] whe e n is a p opo ionali y ac o , A, is he well egion a ea, and L is he ligh in ensi y. Re e ing o he echnology used and no - mal labo a o y illumina ion, he p oduc aL is 4.5pA/p2. Clea ly, unless la ge de ices a e used, he esul ing cu en le els a e oo low o be di eclly used as inpu o ypical p ocessing ci - cui s. A well-known al e na i e [5] is he use o a e ical BJT, as IJ = aAwL (1) ELECTRONICS LETERS 27 h Oc obe 1994 Vol. 30 No. 22 1847 Au ho ized licensed use limi ed o: Uni e sidad de Se illa. Downloaded on Ma ch 25,2020 a 15:44:21 UTC om IEEE Xplo e. Res ic ions apply. shown in Fig. Ib. The e e se-bias cu en o he well-subs a e (base-collec o ) junc ion cons i u es a base cu en , which is ampli- ied a he emi e by he usual ela ionship in he ac i e- o wa d egion IT = (3~ + 1)Ij = (/3~ + 1)c~AwL (2) The measu ed alue o pF is 39, gi ing a pho ocu en o well- a ea a io o 180pAipm2. Cu en le els a e s ill oo low o di ec use in mos p ac ical cases. Fu he ampli ica ion can be achie ed by using wo (o mo e) e ical BJTs in a Da ling on con igu a- ion, as shown in Fig. IC. The esul ing cu en is gi en by ID = (d~ + 1)’~AwsL + (PF + ~)QAwAL (3) whe e subsc ip s S and A e e o ansis o s Qs and QA in Fig. IC, espec i ely. Maximum a ea e iciency is ob ained using ampli y- ing ansis o s (QJ wi h minimum geome ies, and designing he well egion o he sensing ansis o (QJ o achie e he equi ed sensi i i y. Neglec ing he second e m in eqn. 3. and app oxima - ing he pho osenso a ea by A,, he pho ocu en o a ea a io o he de ice is 7nA/pm2, which is su icien ly high o ypical appli- ca ions. N 2=1 E e y ansis o Mn2(i) o ms a cu en mi o wi h MN,, he cu - en -gain being UN. Thus, Finally, i is clea om Fig. 2 ha I;(Z) = I,(z) - Inn,,,(%) = I,(z) - 7, VZ (6) which is he equi ed ans o ma ion. No e ha , i equi ed, he a e age pho ocu en alue can be eco e ed om he ol age le el a node V H, o ins ance using a cu en mi o . Hence, he ans o ma ion ep esen s no loss o in o ma ion. A small-signal analysis o he ini e-impedance e ec a node VT,, esul s in whe e g, is he small-signal ansconduc ance o ansis o s Mnl(i), and gX& he a e age ou pu conduc ance o Mp2(i). Typically, g, > gdsp and hence, eqn. S is a good app oxima ion o eqn. 7, as expec ed. The impo an issue is ha he ini e- impedance e o e lec ed in eqn. 7 is in a ian wi h he numbe o senso s in he a ay, because bo h he equi alen g,, and g,, a e mul iplied by N. a Fig. 1 CMOS compa ible pho osenso s a Diode b Ve ical BIT c Two e ical BJTs in Da ling on con igu a ion (651121 Fig. 2 Signal- ange cen ing ci cui y used a each senso loca ion Signal- ange cen ing: The ci cui in Fig. 2 modi ies he image ep- esen a ion eplacing he cu en a each senso by i s de ia ion wi h espec o hei ins an aneous mean alue. This ci cui y mus be eplica ed a e e y senso loca ion, and node V ,, mus be com- mon o e e y senso . Then, a each indi idual senso i, he pho o- gene a ed cu en Z,(i) is eplica ed wice by means o he double- ou pu cu en mi o composed o ansis o s MJi), Mp2(i), and Mp,(i). The numbe o senso s in he a ay is deno ed by N. Because node VTH is common o e e y senso in he a ay, he indi idual ansis o s Mn,(i) a e all (i = 1, ..., N) connec ed in pa - allel, and hence cons i u e a single spa ially-dis ibu ed ansis o , which we deno e MNI. The equi alen aspec a io WIL o his ansis o is clea ly N imes la ge han ha o any Mnl(i) o Mm2(i). Because node V H is a global node, he indi idual cu en s I,(i) lowing h ough ansis o s Mp2(i) a e added a node V,,, and he sum lows h ough he dis ibu ed ansis o MNl: 1848 Fig. 3 Measu ed I- V esponse o Da ling on pho osenso a Cons an illumina ion b Illumina ion educ ion du ing ol age sweep Ho izon al scale: OSVidi ision Ve ical scale: 3Wldi ision Expe imen : The Da ling on pho osenso and he image-cen ing ci cui y ha e been es ed using se e al p o o ypes manu ac u ed using ISpm n-well CMOS digi al echnology. Fig. 3a shows he measu ed I-V cha ac e is ic o a Da ling on pho osenso wi h A, = 3600pm*, unde cons an labo a o y illu- mina ion; Fig. 3b shows he esul ob ained when ligh in ensi y is g adually educed du ing he ol age sweep. The signal- ange cen ing ci cui y has been success ully used, oge he wi h minimum geome y Da ling on pho osenso s (A ws = 1 85pm2), in se e al highly-pa allel image-p ocessing chips [6]. The image-acquisi ion ci cui y was e alua ed unde di e en illumina- ion condi ions, co esponding o ligh -sou ce dissipa ion wi hin a wo-decade ange. 0 IEE 1994 Elec onics Le e s Online No: 19941287 S. Espejo, R. Dominguez-Cas o, R. Ca mona and A. Rod iguez- Vazquez (Cen o Nacional de Mic oelec dnica, Uni e sidad de Se illa, A da. Reina Me cedes s/n. E-41012 Se illa, Spain) 21 Sep embe I994 ELECTRONICS LETTERS 27 h Oc obe 1994 Vol. 30 No. 22 ~~ ~ Au ho ized licensed use limi ed o: Uni e sidad de Se illa. Downloaded on Ma ch 25,2020 a 15:44:21 UTC om IEEE Xplo e. Res ic ions apply. Re e ences I P oc. SPIE: Imaging Technologies and Applica ions. Vol. 1778. 1992 2 GUPTA. M.M., and KNOPF, G.K. (Ed.): “eu o- ision sys ems, p inciples and applica ions’ (IEEE P ess, 1994) 3 DELEROCK, T.: ‘Silicon e ina wi h co ela ion-based, eloci y uned pixels’, IEEE T ans., 1993, “4, (3), pp. 529-541 4 SOCLOF, s.: ‘Applica ions o analog in eg a ed ci cui s’ (P en ice Hall Inc., 1985) 5 VIDAL.M.P, BAFLEUKM, ~uxo,~., and SARRABAYROURE,G.: ‘A bipola pho ode ec o compa ible wi h s anda d CMOS echnology’, So/id S a e Ekc on., 1991, 34, (S), pp. 809-814 HUERTAS. I.L., and SANCHEZ-SINENCIO, E.: ‘An analog design echnique o sma -pixel CMOS chips’. P oc. 1993 ESSCIRC, Sep embe 1993, (Se illa), pp. 78-81 6 ESPEJO. S., RODRIGUEZ-VAZQUEZ, A., DOMINGUEZ-CASTRO, R., Low ol age BiCMOS dynamic logic ga es H.P. Chen and Y.P. Wu Indexing e ms: BiCMOS in eg a ed ci cui s, Logic ga es A low-supply- ol age BiCMOS logic ga e is p esen ed which can be used o o m a pipelined sys em using he wo-phase non- o e lapping clocks. The new BiCMOS dynamic logic ga es ha e no DC powe dissipa ions and hey ha e ull ol age swings. I has been shown ha he use o he desc ibed eedback echnique p o ides a lowe ga e delay han p e iously epo ed low- ol age designs. In oduc ion: Pe o mance deg ada ion a low ol age is e i ied o be a majo limi ing ac o o BiCMOS ci cui s. The educed swing deg ades he speed o he d i en ga es, especially when he supply ol age is scaled down. Ano he disad an age o he educed swing is he noise ma gin educ ion. To o e come he d awback, ull-swing complemen a y designs using complemen a y bipola de ice ha e been ecen ly epo ed [I]. Howe e , he ad an ages o he C-BiCMOS a e conside ably o se by he addi- ional p ocess complexi y and cos o he pnp bipola ab ica ion. In his Le e , a ci cui echnique using a eedback in e e o imp o e he BiCMOS logic swing and allow low ol age ope a ion is p oposed. This design o e s an e ec i e speed imp o emen o e o he exis ing designs, such as me ged BiCMOS (M-BiC- MOS) [2] and quasi-complemen a y BiCMOS (QC-BiCMOS) 131, wi hou using ex a p ocessing s eps in an npn-only BiCMOS p ocess. KJ qQ’ MNI * Fig. 1 P oposed BiCMOS dynamic N-ceN L 040 ’ * Fig. 2 P oposed BiCMOS dynamic P-ceN Ci cui : The ull-swing ope a ion can be ealised by using a eed- back in e e as shown in Figs. 1 and 2. To o ganise o o m a dynamic pipelined sys em [4], he logic ga es can be di ided in o wo ypes, he N-cell and P-cell. The ope a ion o hese wo ga es is as ollows. As shown in Fig. 1, he N-cell has wo ope a ion phases, ha is, p echa ge phase and e alua ion phase. Du ing he p echa ge pe iod when he CK signal is low, MN1 is u ned o , and he cu en supplied by MPl is ully used o d i e Ql. The ou pu node is cha ged quickly o a alue highe han V, - VBE. Using he eedback in e e , he ou pu node is pulled up o V, h ough MPe. A e he p echa ge pe iod when he CK signal goes high, MNe is u ned o and he base o Ql is discha ged h ough MN1. Hence, sho ci cui cu en in Ql and Q2 can be a oided du ing he nex pull-down he eby educing unnecessa y powe dissipa ion. The ou pu logic alue is de e mined by he logic ci - cui block N, which is composed o nMOS ansis o s. Assuming a high- o-low ansi ion a he ou pu node due o he logic alue, he ou pu ol age dec eases un il i eaches VBE. MNe is u ned on in his ime. This could lead o he sa u a ion o Q2 causing he ou pu ol age o all o V,,, close o OV. As shown in Fig. 2, he ope a ion o he P-cell can be simila ly explained as ollows. Du - ing he p edischa ge phase when is high, Ql is u ned o due o he u ned on MN1 and he ou pu node is discha ged o se up o low le el, close o 0 V. Du ing he e alua ion phase when is low, MN1 is u ned o and he base o Q2 is discha ged by MNe. The ou pu logic alue is de e mined by he logic ci cui block P, which is composed o PMOS ansis o s 0 10 20 30 ns mm Fig. 3 T ansien wa e o ms o he ou in e e s - - 0 - - CMOS _____ M-BiCMOS [I] .... QC-BiCMOS [2] - - 0 - - p oposed BiCMOS (N-cell + P-cell) Compa isons: To compa e he pe o mance o he p oposed BiC- MOS ci cui wi h hose o CMOS, M-BiCMOS, and QC-BiCMOS ci cui s, he se ies o wo in e e s o each BiCMOS ci cui is sim- ELECTRONICS LE77ERS 27 h Oc obe 7994 Vol. 30 No. 22 1849 Au ho ized licensed use limi ed o: Uni e sidad de Se illa. Downloaded on Ma ch 25,2020 a 15:44:21 UTC om IEEE Xplo e. Res ic ions apply.