1.2 V Differential Difference Transconductance Amplifier and Its Application in Mixed-Mode Universal Filter

Citation: Kumngern, M.; Suksaibul, P.; Khateb, F.; Kulej, T. 1.2 V Differential Difference Transconductance Amplifier and Its Application in Mixed-Mode Universal Filter. Sensors 2022,22, 3535. https://doi.org/10.3390/ s22093535 Academic Editors: Haruo Kobayashi and Alfio Dario Grasso Received: 8 March 2022 Accepted: 4 May 2022 Published: 6 May 2022 Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. Copyright: © 2022 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/). sensors Article 1.2 V Differential Difference Transconductance Amplifier and Its Application in Mixed-Mode Universal Filter Montree Kumngern 1, Pichai Suksaibul 1, Fabian Khateb 2,3,4,* and Tomasz Kulej 5 1Department of Telecommunications Engineering, School of Engineering, King Mongkut’s Institute of Technology Ladkrabang, Bangkok 10520, Thailand; [email protected] (M.K.); [email protected] (P.S.) 2Department of Microelectronics, Brno University of Technology, Technická10, 601 90 Brno, Czech Republic 3Faculty of Biomedical Engineering, Czech Technical University in Prague, nám. Sítná3105, 272 01 Kladno, Czech Republic 4 Department of Electrical Engineering, Brno University of Defence, Kounicova 65, 662 10 Brno, Czech Republic 5Department of Electrical Engineering, Czestochowa University of Technology, 42-201 Czestochowa, Poland; [email protected] *Correspondence: [email protected]; Tel.: +420-54114-6128 Abstract: This paper presents a new mixed-mode universal filter based on a differential difference transconductance amplifier (DDTA). Unlike the conventional transconductance amplifier (TA), this DDTA has both advantages of the TA and the differential difference amplifier (DDA). The proposed filter can offer four-mode operations of second-order transfer functions into a single topology, namely, voltage-mode (VM), current-mode (CM), transadmittance-mode (TAM), and transimpedance-mode (TIM) transfer functions. Each operation mode offers five standard filtering responses; therefore, at least twenty filtering transfer functions can be obtained. For the filtering transfer functions, the matching conditions for the input and passive component are absent. The natural frequency and the quality factor can be set orthogonally and electronically controlled. The performance of the proposed topology was evaluated by PSPICE simulator using the 0.18 µ m CMOS technology from the Taiwan Semiconductor Manufacturing Company (TSMC). The voltage supply was 1.2 V and the power dissipation of the DDTA was 66 µ W. The workability of the filter was confirmed through experimental test by DDTA-based LM13600 discrete-component integrated circuits. Keywords: mixed-mode filter; universal filter; differential difference transconductance amplifier; analog signal processing 1. Introduction Universal filters are basic electronic blocks that usually provide five filtering responses into a single topology, namely, low-pass (LP), high pass (HP), band pass (BP), band stop (BS), and all pass (AP) filters. The applications such as three crossover network high-fidelity loudspeakers [ 1 , 2 ], touch-tone telephone tone decoders [ 2 ], and high-order filters [ 3 ] require universal filters as the basic building blocks. Moreover, universal filters can be fabricated as commercial programmable filter-integrated circuits [ 4 ]. As a commercially available IC, it is valuable if a single IC can provide a multi-mode filter that depends on the applications of the circuit designer. There are many universal filters available in the open literature, for example, see [ 5 – 14 ]. Considering input and output signals, these universal filters can be classified as four-mode operations as follows: voltage-mode (VM) filter when both input and output signals are in voltage form [ 5 , 6 ]; current-mode (CM) filter when both input and output signals are in current form [7,8]; transadmittance-mode (TAM) filter when the input signal is in voltage form while the output signal is in current form [ 9 – 11 ], and finally transimpedance-mode (TIM) filter when the input signal is in current form while the output signal is in voltage form [ 12 – 14 ]. It should be noted that the universal filters in [ 12 – 14 ] offer only a single-mode filter. Sensors 2022,22, 3535. https://doi.org/10.3390/s22093535 https://www.mdpi.com/journal/sensors Sensors 2022,22, 3535 2 of 21 Recently, universal filters that operate as multi-mode filters into a single topology, the so-called mixed-mode universal filters, have been reported [ 15 – 22 ]. Compared with single-mode universal filters in [ 5 – 15 ], mixed-mode universal filters in [ 15 – 22 ] can provide larger filtering responses. Unfortunately, these mixed-mode universal filters cannot realize four modes of operation into a single topology. There are mixed-mode universal filters that can realize VM, CM, TAM, and TIM filters into a single topology available in the literature [23–45] . However, some of these topologies suffer from some drawbacks as follows: 1. Lack of electronic tunability [24–29,34,35,38–41]; 2. Employment of floating passive components [24–29,32,35,38,39,41,44–46]; 3. Active or passive component matching condition [24–35,37,39,41,44,46]; 4. Input signal matching condition or requirement of a minus-type input signal [ 30 , 31 , 33,34,37,39,45]; 5. Input voltage signal being applied via capacitor or resistor [24–29,32,34,35,38,39,41,44–46] ; and 6. Inability to provide at least twenty filtering responses into a single topology [ 23 , 24 , 27 , 29,33,36,38,40,42,45]. A universal filter that allows electronic tunability can offer some advantages such as the ease of compensation when the natural frequency is deviated by the effect of temperature or process variations, while a universal filter without a floating capacitor and resistor and free from the passive component matching condition is more suitable for integrated circuit implementation. A universal filter that requires a minus-type input signal or an input signal matching condition needs additional circuits such as current-mirror for CM operation or inverting amplifier for VM operation. This requirement defects VM operation because many passive components are usually required, unless the universal filter provides a fully differential structure. Finally, a universal filter that provides at least twenty filtering responses means that each operation mode can realize five standard filtering responses; hence, the full capability of the mixed-mode universal filter can be obtained. This study focused on a mixed-mode universal filter that could realize VM, CM, TAM, and TIM filters into a single topology. Each operation mode could realize five standard filtering responses; thus, twenty filtering responses could be obtained. The active device, named differential difference transconductance amplifier (DDTA), was used in this study. This device employs high-input impedance terminals with the advantage of input voltage arithmetic operation such as the differential difference amplifier (DDA) [ 47 ], and the capability of electronic tuning such as the transconductance amplifier. Thus, a DDTA-based circuit is easy for addition and subtraction of voltage signals and possesses an electronic tuning capability [ 48 – 51 ]. Unlike the standard differential difference transconductance amplifier that was created by two differential pair DDAs followed by the transconductance amplifier presented in [ 52 ], the proposed DDTA is based on one multiple-input differential pair DDA [ 53 – 56 ] that serves as a differential difference transconductance amplifier followed by a voltage buffer. Therefore, the proposed DDTA could reduce the count of active blocks, power dissipation, and chip area as a result of using the multiple-input MOS transistor (MI − MOST) technique [ 57 ]. It is worth noting that the MI-MOST comes with several advantages compared with the multiple-input floating-gate (MIFG) transistor [ 58 ]. The MIFG transistor uses the charge conversation principle and hence it is incompatible with modern nanoscale gate-leakage CMOS technologies [ 59 ]. The MIFG implementation requires two-polysilicon technology, and the remaining residual charge on its gate causes voltage offset. Therefore, a new DDTA-based mixed-mode universal filter that could provide at least twenty filtering responses of VM, CM, TAM, and TIM filters is presented in this paper. The DDTA uses the MI − MOST technique that offers simplification of its overall structure and a reduction in the power dissipation. The proposed mixed-mode universal filter offers the following advantages such as: i. electronic tuning capability; ii. being free from a floating passive component; Sensors 2022,22, 3535 3 of 21 iii. being free from a passive component matching condition; iv. lacking a minus-type input signal or an input signal matching condition; v. not applying the input voltage signal via a capacitor or resistor; and vi. each operation of VM, TAM, CM and TIM offering five standard filtering responses. The comparison of the proposed filter with the previous mixed-mode universal filters is shown in Table 1. Compared with [ 30 , 31 ] that have equal active and passive components, the proposed filter is free from active and passive component matching conditions as well as the minus-type input signal requirement. Compared with [ 43 ] that offers similar performances, the proposed filter employs fewer components and provides more filtering functions. Compared with [ 44 – 46 ] that employ fewer devices, the proposed filter applies the input voltage signal via a high-impedance node whereas the filters in [ 44 – 46 ] apply the input voltage signal via a capacitor or resistor. This paper is organized as follows: in Section 2, the TA-based DDA using MI-MOSTs and the proposed mixed-mode universal filter are presented; Section 3presents the simulation results and experimental results; and Section 4concludes the paper. Sensors 2022,22, 3535 4 of 21 Table 1. Comparison the proposed filter with the previous mixed-mode universal filter. Ref. No. of Device Power Supply No. of C&R Obtaining Function PD [mW] THD of LP [%] BW [kHz] (i) (ii) (iii) (iv) (v) (vi) [23] 2003 4-CCCII - 2 & 0 14 - - - Yes Yes Yes Yes Yes No [24] 2004 5-CCII - 2 & 7 12 - - - No No No Yes No No [25] 2005 4-CFOA ±12 V 2 & 9 20 - - 112.5 No No No Yes No Yes [26] 2006 3-CCII ±12 V 3 & 4 20 - - - No No No Yes No Yes [27] 2006 3-FTFN - 2 & 3 11 - - 31.8 No No Yes Yes No No [28] 2007 2-DDCC ±1.25 V 2 & 4 20 - - 4.973 ×103No No No Yes No Yes [29] 2008 1-FDCCII ±1.25 V 2 & 3 17 - - 3.316 ×103No No No Yes No No [30] 2009 5-OTA ±1.65 V 2 & 0 24 30.95 - 1×103Yes Yes No No Yes Yes [31] 2010 5-OTA ±1.25 V 2 & 0 20 - 0.777@400 mV pp 1.591 ×103Yes Yes No No Yes Yes [32] 2010 2-CCCII ±2.5 V 2 & 1 20 - <5@500 µApp 1.27 ×103Yes No No Yes No Yes [33] 2011 3-CCCCTA ±1 V 2 & 0 16 4.84 - 1.06 ×103Yes Yes No No Yes No [34] 2011 3-DDCC ±1.25 V 2 & 3 30 - 0.723@60 µApp 3.978 ×103No Yes No No Yes Yes [35] 2011 3-DDCC ±1.25 V 2 & 4 20 - - 3.978 ×103No No No Yes No Yes [36] 2012 4-MOCCCII ±2.5 V 2 & 0 12 - - - Yes Yes Yes Yes Yes No [37] 2013 4-MOCCCII ±1.25 V 2 & 0 20 - 0.5@300 µApp - Yes Yes No No Yes Yes [38] 2015 2-CCII ±1.25 V 2 & 2 11 - - 2×103No No Yes Yes No No [39] 2016 1-FDCCII, 1-DDCC ±0.9 V 2 & 6 46 - 2.2@300 mVpp 1.591 ×103No No No No No Yes [40] 2016 2-DVCC ±1.25 V 2 & 3 14 - - 3.978 ×103No Yes Yes Yes Yes No [41] 2016 2-FDCCII ±0.9 V 2 & 5 25 - 0.971@200 mV pp 1.591 ×103No No No Yes No Yes [42] 2017 3-CCCCTA ±0.9 V 2 & 0 18 1.99 2.16@500 mVpp 3.183 ×103Yes Yes Yes Yes Yes No [43] 2017 6-MI-OTA ±0.5 V 2 & 0 20 0.075 2@50 mVpp 1.5 ×103Yes Yes Yes Yes Yes Yes [44] 2020 2-EXCCTA ±1.25 V 2 & 4 20 - <5@520 mVpp 7.622 ×103Yes No No Yes No Yes Sensors 2022,22, 3535 5 of 21 Table 1. Cont. Ref. No. of Device Power Supply No. of C&R Obtaining Function PD [mW] THD of LP [%] BW [kHz] (i) (ii) (iii) (iv) (v) (vi) [45] 2021 1-EX-CCCII ±0.5 V 2 & 1 17 1.35 0.2@520 mVpp 23 ×103Yes No Yes No No No [46] 2021 1-VD-EXCCII ±1.25 V. 2 & 3 20 5.76 <7.5@650 mVpp 8.084 ×103Yes No No Yes No Yes This study 5-DDTA 1.2 V 2 & 0 36 0.33 1.09@650 mVpp 1.04 Yes Yes Yes Yes Yes Yes Note: PD = power dissipation, THD = total harmonic distortion, and BW = bandwidth. Sensors 2022,22, 3535 6 of 21 2. Proposed Circuit 2.1. Proposed Mixed-Mode Universal Filter The symbol of DDTA is shown in Figure 1a. The relationship of the terminals can be expressed by Vw=Vy1−Vy2+Vy3 Io=GmVw(1) Sensors 2022, 22, x FOR PEER REVIEW 5 of 21 2. Proposed Circuit 2.1. Proposed Mixed-Mode Universal Filter The symbol of DDTA is shown in Figure 1a. The relationship of the terminals can be expressed by 𝑉𝑤=𝑉𝑦1−𝑉𝑦2+𝑉𝑦3 𝐼𝑜=𝐺𝑚𝑉𝑤} (1) It should be noted that the output 𝑉𝑤 is the addition and subtraction of inputs 𝑉𝑦1, 𝑉𝑦2, and 𝑉𝑦3, while the output 𝐼𝑜 is the current that is converted from 𝑉𝑤 by 𝐺𝑚, where 𝐺𝑚 is the internal transconductance of DDTA. Therefore, DDTA included the DDA as an input stage that serves also as a transconductance amplifier (TA) as an output stage. Compared with the differential difference current conveyor transconductance amplifier (DDCCTA) [60], the DDTA structure employs less MOS transistors. Figure 1b shows the internal structure of the proposed DDTA. The voltage follower (VF) circuit was used to avoid the loading effect. Therefore, the w-terminal possessed a low-impedance level that could be directly connected to a low-resistance external load. DDTA y1 o Vy1 Io w Vw y3 Vy3 y2 Vy2 + - + - - y1 y2 y3w TA-based DDA VF (a) (b) Rset - - Io Io DDA w' Figure 1. TA-based DDA: (a) symbol; (b) internal structure. The structure of DDTA in [52] was developed to the DDTA using MI-MOST as shown in Figure 2. Figure 3a shows the MI-MOST symbol with n number of inputs where the input terminals V1, …, Vn are coupled to the gate terminal of the conventional MOST by n input capacitors CG1, …, CGn. To guarantee the DC operation, the high resistances RMOS1, …, RMOSn are connected in parallel to each input capacitor, as shown in Figure 3b. The high resistance 𝑅𝑀𝑂𝑆 is implemented by two MOSTs (MR) operating in the cut-off region as shown in Figure 3c, which offers a minimum area of chip. It is worth noting that the pseudo-resistors shunt the input capacitors for proper DC operation of the input transistor; therefore, there are no floating-gate issues as in the case of the MIFG transistor. However, for AC operation, the input capacitors create a short circuit for the AC signal, the same as in the case of the MIFG technique. M1 M3 M2 Mb Ib M4M5 M9 RMOS M6 Cc C VDD VSS y1 y3y2 Vb Rset M10 M7 o M11 M8 o IoIoM13 M14 M12 M15 M16 M18 RMOS1 M17 Cc1 C1 Vb w w' Figure 2. TA-based DDA using MI-MOSTs. Figure 1. TA-based DDA: (a) symbol; (b) internal structure. It should be noted that the output Vw is the addition and subtraction of inputs Vy1 , Vy2 and Vy3 , while the output Io is the current that is converted from Vw by Gm , where Gm is the internal transconductance of DDTA. Therefore, DDTA included the DDA as an input stage that serves also as a transconductance amplifier (TA) as an output stage. Compared with the differential difference current conveyor transconductance amplifier (DDCCTA) [ 60 ], the DDTA structure employs less MOS transistors. Figure 1b shows the internal structure of the proposed DDTA. The voltage follower (VF) circuit was used to avoid the loading effect. Therefore, the w-terminal possessed a low-impedance level that could be directly connected to a low-resistance external load. The structure of DDTA in [ 52 ] was developed to the DDTA using MI-MOST as shown in Figure 2. Figure 3a shows the MI-MOST symbol with n number of inputs where the input terminals V 1 , . . . , V n are coupled to the gate terminal of the conventional MOST by n input capacitors C G1 , . . . , C Gn . To guarantee the DC operation, the high resistances R MOS1 , . . . , R MOSn are connected in parallel to each input capacitor, as shown in Figure 3b. The high resistance RMOS is implemented by two MOSTs (M R ) operating in the cut-off region as shown in Figure 3c, which offers a minimum area of chip. It is worth noting that the pseudo-resistors shunt the input capacitors for proper DC operation of the input transistor; therefore, there are no floating-gate issues as in the case of the MIFG transistor. However, for AC operation, the input capacitors create a short circuit for the AC signal, the same as in the case of the MIFG technique. Sensors 2022, 22, x FOR PEER REVIEW 5 of 21 2. Proposed Circuit 2.1. Proposed Mixed-Mode Universal Filter The symbol of DDTA is shown in Figure 1a. The relationship of the terminals can be expressed by 𝑉𝑤=𝑉𝑦1−𝑉𝑦2+𝑉𝑦3 𝐼𝑜=𝐺𝑚𝑉𝑤} (1) It should be noted that the output 𝑉𝑤 is the addition and subtraction of inputs 𝑉𝑦1, 𝑉𝑦2, and 𝑉𝑦3, while the output 𝐼𝑜 is the current that is converted from 𝑉𝑤 by 𝐺𝑚, where 𝐺𝑚 is the internal transconductance of DDTA. Therefore, DDTA included the DDA as an input stage that serves also as a transconductance amplifier (TA) as an output stage. Compared with the differential difference current conveyor transconductance amplifier (DDCCTA) [60], the DDTA structure employs less MOS transistors. Figure 1b shows the internal structure of the proposed DDTA. The voltage follower (VF) circuit was used to avoid the loading effect. Therefore, the w-terminal possessed a low-impedance level that could be directly connected to a low-resistance external load. DDTA y1 o Vy1 Io w Vw y3 Vy3 y2 Vy2 + - + - - y1 y2 y3w TA-based DDA VF (a) (b) Rset - - Io Io DDA w' Figure 1. TA-based DDA: (a) symbol; (b) internal structure. The structure of DDTA in [52] was developed to the DDTA using MI-MOST as shown in Figure 2. Figure 3a shows the MI-MOST symbol with n number of inputs where the input terminals V1, …, Vn are coupled to the gate terminal of the conventional MOST by n input capacitors CG1, …, CGn. To guarantee the DC operation, the high resistances RMOS1, …, RMOSn are connected in parallel to each input capacitor, as shown in Figure 3b. The high resistance 𝑅𝑀𝑂𝑆 is implemented by two MOSTs (MR) operating in the cut-off region as shown in Figure 3c, which offers a minimum area of chip. It is worth noting that the pseudo-resistors shunt the input capacitors for proper DC operation of the input transistor; therefore, there are no floating-gate issues as in the case of the MIFG transistor. However, for AC operation, the input capacitors create a short circuit for the AC signal, the same as in the case of the MIFG technique. M1 M3 M2 Mb Ib M4M5 M9 RMOS M6 Cc C VDD VSS y1 y3y2 Vb Rset M10 M7 o M11 M8 o IoIoM13 M14 M12 M15 M16 M18 RMOS1 M17 Cc1 C1 Vb w w' Figure 2. TA-based DDA using MI-MOSTs. Figure 2. TA-based DDA using MI-MOSTs. It is worth noting that the multiple input techniques are simply created by a set of parallel capacitors shunted with high-resistance pseudo-resistors (M R ). This technique can be applied to the gate-, bulk-, gate-bulk (DTMOS), or bulk-quasi-floating-gate terminals of a standard MOS transistor [61]. In Figure 2, the transistors M 1 –M 6 and M 9 create the DDA core circuit. The MIMOST differential pairs M 1 and M 2 , the transistor M 3 , and the two current sources M 4 Sensors 2022,22, 3535 7 of 21 and M 5 create the differential stage of the DDA. The transistor M 3 along with M 2 and M 5 create a flipped voltage follower (FVF) [ 62 ] and it is used to enforce the current of M 3 (i.e., I M3 ) to be equal to the tail current, same as in the case of the differential stage of the conventional structure. The FVF modifies the gate of M 3 to ensure equal drain currents for both differential pairs M 1 and M 2 [ 63 ]. Furthermore, due to the FVF, the minimum voltage supply is the sum of one gate-source and one drain-source voltage (VDD(min)=VGS−M3+VDS−M5). Sensors 2022, 22, x FOR PEER REVIEW 6 of 21 M V1 CG1 Vn MRMOS = MR MR RMOS1 RMOSn S G D V1 Vn (a) (b) (c) CGn Figure 3. MI-MOST: (a) symbol; (b) realization; (c) realization of the large resistance value. It is worth noting that the multiple input techniques are simply created by a set of parallel capacitors shunted with high-resistance pseudo-resistors (MR). This technique can be applied to the gate-, bulk-, gate-bulk (DTMOS), or bulk-quasi-floating-gate terminals of a standard MOS transistor [61]. In Figure 2, the transistors M1–M6 and M9 create the DDA core circuit. The MI-MOST differential pairs M1 and M2, the transistor M3, and the two current sources M4 and M5 create the differential stage of the DDA. The transistor M3 along with M2 and M5 create a flipped voltage follower (FVF) [62] and it is used to enforce the current of M3 (i.e., IM3) to be equal to the tail current, same as in the case of the differential stage of the conventional structure. The FVF modifies the gate of M3 to ensure equal drain currents for both differential pairs M1 and M2 [63]. Furthermore, due to the FVF, the minimum voltage supply is the sum of one gate-source and one drain-source voltage (𝑉𝐷𝐷(min)=𝑉𝐺𝑆−𝑀3+𝑉𝐷𝑆−𝑀5). Transistors M6 and M9 form a super class AB second stage [64]. The RMOS is responsible for the gate DC biasing of the transistor M6, whereas the capacitor C delivers the AC signal to this gate. The node 𝑤′ is connected to the input terminal of M2, creating negative feedback for obtaining a unity-gain voltage follower. The DDA stability is insured by the compensation capacitor Cc. The transistors M12–M18, RMOS1, and capacitors Cc1 and C1 are used to work as a voltage follower circuit. The operation is similar to the first stage of DDTA that was previously explained. Therefore, the relationship 𝑉𝑤=𝑉𝑦1−𝑉𝑦2+𝑉𝑦3 (𝑉𝑤=𝑉𝑤′) can be obtained. The bias current 𝐼𝑏 and Mb generated the bias voltage 𝑉𝑏 for M4−M8 and M15−M17. The terminal 𝑤′ is connected to a linear adjustable resistor 𝑅𝑠𝑒𝑡 that converts the voltage 𝑉𝑤′ to current 𝐼𝑤′. This current is mirrored by M7−M10 to the o-terminals; thus, 𝐼𝑜=𝐼𝑤′ can be achieved. Additional output current o-terminals can be obtained using complementary transistors such as M8 and M11. Hence, this part works as a transconductance amplifier. The output current 𝐼𝑜 is obtained as 𝑉𝑤′=(𝑉𝑦1−𝑉𝑦2+𝑉𝑦3) (2) 𝐼𝑜=𝑉𝑤′ 𝑅𝑠𝑒𝑡=(𝑉𝑦1−𝑉𝑦2+𝑉𝑦3) 𝑅𝑠𝑒𝑡 (3) 𝐺𝑚𝑠𝑒𝑡=1 𝑅𝑠𝑒𝑡=𝐼𝑜 (𝑉𝑦1−𝑉𝑦2+𝑉𝑦3) (4) Note that the high linearity is achieved due to the linear resistance Rset. The DDA operates in a closed loop, just forming a second-generation current conveyor, with the 𝑤′ output terminal loaded by Rset, and such a configuration can be considered as a transconductance amplifier. However, the attenuation of the input signal by capacitors allows enlarging the input common mode range, as well as the range of linear operation (the range where the so-called hard nonlinearities associated with changing the region of operation of transistors do not appear). The proposed mixed-mode universal filter using DDTAs is shown in Figure 4. It consisted of five DDTAs and two grounded capacitors. The variant transfer functions could be obtained by applying the appropriate input signals 𝑉𝑖𝑛1,𝑉𝑖𝑛2,𝐼𝑖𝑛1, and 𝐼𝑖𝑛2 and selecting the appropriate output signals 𝑉𝑜1,𝑉𝑜2,𝑉𝑜3,𝑉𝑜4,𝑉𝑜5,𝐼𝑜1, and 𝐼𝑜2. The input voltage Figure 3. MI-MOST: (a) symbol; (b) realization; (c) realization of the large resistance value. Transistors M 6 and M 9 form a super class AB second stage [ 64 ]. The RMOS is responsible for the gate DC biasing of the transistor M 6 , whereas the capacitor C delivers the AC signal to this gate. The node w0 is connected to the input terminal of M 2 , creating negative feedback for obtaining a unity-gain voltage follower. The DDA stability is insured by the compensation capacitor C c . The transistors M 12 –M 18 , R MOS1 , and capacitors C c1 and C 1 are used to work as a voltage follower circuit. The operation is similar to the first stage of DDTA that was previously explained. Therefore, the relationship Vw=Vy1−Vy2+Vy3 ( Vw=Vw0 ) can be obtained. The bias current Ib and M b generated the bias voltage Vb for M 4− M 8 and M 15− M 17 . The terminal w0 is connected to a linear adjustable resistor Rset that converts the voltage Vw0 to current Iw0 . This current is mirrored by M 7− M 10 to the o-terminals; thus, Io=Iw0 can be achieved. Additional output current o-terminals can be obtained using complementary transistors such as M 8 and M 11 . Hence, this part works as a transconductance amplifier. The output current Iois obtained as Vw0=Vy1−Vy2+Vy3(2) Io=Vw0 Rset =Vy1−Vy2+Vy3 Rset (3) Gmset =1 Rset =Io Vy1−Vy2+Vy3(4) Note that the high linearity is achieved due to the linear resistance R set . The DDA operates in a closed loop, just forming a second-generation current conveyor, with the w0 output terminal loaded by R set , and such a configuration can be considered as a transconductance amplifier. However, the attenuation of the input signal by capacitors allows enlarging the input common mode range, as well as the range of linear operation (the range where the so-called hard nonlinearities associated with changing the region of operation of transistors do not appear). The proposed mixed-mode universal filter using DDTAs is shown in Figure 4. It consisted of five DDTAs and two grounded capacitors. The variant transfer functions could be obtained by applying the appropriate input signals Vin1 , Vin2 , Iin1 , and Iin2 and selecting the appropriate output signals Vo1 , Vo2 , Vo3 , Vo4 , Vo5 , Io1 , and Io2 . The input voltage which is not used ( Vin = 0) should be attached to ground while the input current which is not used ( Iin = 0) should be floated. The Gmsetj ( Gmsetj = 1 /Rsetj ) is the transconductance of Sensors 2022,22, 3535 8 of 21 DDTAj ( j= 1, 2, 3, 4, 5). Using (1) and nodal analysis, the output voltages and currents of the proposed mixed-mode universal filter can be expressed by Vo1= Gmset5(sC2Gmset2+Gmset1Gmset2)Vin1−Gmset1Gmset2Gmset5Vin2 −Gmset5(sC2+Gmset1)Iin1−Gmset1Gmset2Iin2 D(s)(5) Vo2= Gmset1Gmset2Gmset5Vin1+sC1Gmset1Gmset5Vin2 −Gmset1Gmset5Iin1+sC1Gmset1Iin2 D(s)(6) Vo3= sC2Gmset2Gmset5Vin1+s2C1C2Gmset5Vin2 −sC2Gmset5Iin1+s2C1C2Iin2 D(s)(7) Vo4= Gmset1Gmset2Gmset5Vin1−Gmset5(s2C1C2+Gmset1Gmset2)Vin2 −Gmset1Gmset5Iin1−s2C1C2+Gmset1Gmset2Iin2 D(s)(8) Vo5= 2Gmset1Gmset2Gmset5Vin1−Gmset5s2C1C2−sC1Gmset1+Gmset1Gmset2Vin2 −2Gmset1Gmset5Iin1−s2C1C2−sC1Gmset1+Gmset1Gmset2Iin2 D(s)(9) Io1= sC2Gmset1Gmset2Gmset5Vin1+s2C1C2Gmset1Gmset5Vin2 −sC2Gmset1Gmset5Iin1+s2C1C2Gmset1Iin2 D(s)(10) Io2= Gmset2Gmset5s2C1C2+sC1Gmset1Vin1−sC1Gmset1Gmset2Gmset5Vin2 −Gmset5s2C1C2+sC1Gmset1Iin1−sC1Gmset1Gmset2Iin2 D(s)(11) Io3= Gmset1Gmset2Gmset3Gmset5Vin1−Gmset3Gmset5s2C1C2+Gmset1Gmset2Vin2 −Gmset1Gmset3Gmset5Iin1−Gmset3s2C1C2+Gmset1Gmset2Iin2 D(s)(12) Io4= 2Gmset1Gmset2Gmset4Gmset5Vin1−Gmset4Gmset5s2C1C2−sC1Gmset1+Gmset1Gmset2Vin2 −2Gmset1Gmset4Gmset5Iin1−Gmset4s2C1C2−sC1Gmset1+Gmset1Gmset2Iin2 D(s)(13) where D(s)=s2C1C2Gmset5+sC1Gmset1Gmset5+Gmset1Gmset2Gmset5 . By appropriately applying the input signals ( Vin1 , Vin2 , Iin1 , and Iin2 ) and choosing the output terminals ( Vo1 , Vo2 , Vo3 , Vo4 , Vo5 , Io1 , Io2 , Io3 , and Io4 ), the VM, CM, TAM, and TIM filters can be expressed as in Table 3. It was evident that the proposed filter offers four modes of operation into a single topology. Each mode of operation provides five standard filtering transfer functions; hence, at least twenty transfer functions can be obtained. In addition, several filtering functions can be obtained from the same mode of operation; thus, the proposed topology can provide 36 filtering functions. It should be noted that some filtering functions offer some advantages such as the gain of transfer function when Vin1 is the input and Vo5 is the output for LP of the VM filter, the high-Q filter when Vin1=Vin2is the input and Vo2is the output for BP of the VM filter, and offer both non-inverting and inverting filtering functions for HP of TAM filter. The natural frequency ( ωo ) and the quality factor ( Q ) of the proposed filter can be given as ωo=sGmset1Gmset2 C1C2 (14) Sensors 2022,22, 3535 9 of 21 Q=sC2Gmset2 C1Gmset1 (15) From (14) and (15), the parameter ωo can be adjusted electronically by Gmset1 and Gmset2 whereas the parameter Q can be given by C2/C1 by keeping Gmset1 = Gmset2 . Thus, the proposed filter can be electronically controlled for parameter ωo and orthogonally controlled for parameters ωoand Q. Sensors 2022, 22, x FOR PEER REVIEW 8 of 21 DDTA1 y1o w y3 y2o DDTA2 y2o w y3 y1o DDTA3 y1o w y3 y2 DDTA4 y1o w y3 y2 Vo3 Vo5 C2 Io4 Io2 Io3 Io1 Vo4 Vin1 Vin2 Iin2 Vo1 DDTA5 y1o w y3 y2 C1 Iin1 Vo2 Figure 4. Proposed mixed-mode universal filter using DDTAs. It should be noted that some filtering functions offer some advantages such as the gain of transfer function when 𝑉𝑖𝑛1 is the input and 𝑉𝑜5 is the output for LP of the VM filter, the high-Q filter when 𝑉𝑖𝑛1 = 𝑉𝑖𝑛2 is the input and 𝑉𝑜2 is the output for BP of the VM filter, and offer both non-inverting and inverting filtering functions for HP of TAM filter. The natural frequency (𝜔𝑜) and the quality factor (𝑄) of the proposed filter can be given as 𝜔𝑜=√𝐺𝑚𝑠𝑒𝑡1𝐺𝑚𝑠𝑒𝑡2 𝐶1𝐶2 (14) 𝑄=√𝐶2𝐺𝑚𝑠𝑒𝑡2 𝐶1𝐺𝑚𝑠𝑒𝑡1 (15) From (14) and (15), the parameter 𝜔𝑜 can be adjusted electronically by 𝐺𝑚𝑠𝑒𝑡1 and 𝐺𝑚𝑠𝑒𝑡2 whereas the parameter 𝑄 can be given by 𝐶2/𝐶1 by keeping 𝐺𝑚𝑠𝑒𝑡1 = 𝐺𝑚𝑠𝑒𝑡2. Thus, the proposed filter can be electronically controlled for parameter 𝜔𝑜 and orthogonally controlled for parameters 𝜔𝑜 and 𝑄. It should be noted that the terminals 𝑉𝑜3, 𝑉𝑜4, and 𝑉𝑜5 possess low-output impedance whereas the terminals 𝐼𝑜1, 𝐼𝑜2, 𝐼𝑜3, and 𝐼𝑜4 possess a high-output impedance, and thus the loads can be connected directly without additional buffer circuit requirements. The terminals 𝑉𝑖𝑛1 and 𝑉𝑖𝑛2 possess a high-input impedance, hence the condition such as 𝑉𝑖𝑛1 = 𝑉𝑖𝑛2 is not required for additional buffer circuits. However, the terminals 𝑉𝑜1 and 𝑉𝑜2 do not provide a low-output impedance and the terminals 𝐼𝑖𝑛1 and 𝐼𝑖𝑛2 do not provide a low-input impedance; therefore, the buffer circuits may be required if low-impedance loads are connected and if low-impedance current signals are supplied. In the case of CM and TIM filters, the matching condition is absent and in the case of VM and TAM, the inverting-type input is not used. 2.2. Non-Ideality Analysis Considering non-idealities of DDTA, (1) can be rewritten as Figure 4. Proposed mixed-mode universal filter using DDTAs. It should be noted that the terminals Vo3 , Vo4 , and Vo5 possess low-output impedance whereas the terminals Io1 , Io2 , Io3 , and Io4 possess a high-output impedance, and thus the loads can be connected directly without additional buffer circuit requirements. The terminals Vin1 and Vin2 possess a high-input impedance, hence the condition such as Vin1=Vin2 is not required for additional buffer circuits. However, the terminals Vo1 and Vo2 do not provide a low-output impedance and the terminals Iin1 and Iin2 do not provide a low-input impedance; therefore, the buffer circuits may be required if low-impedance loads are connected and if low-impedance current signals are supplied. In the case of CM and TIM filters, the matching condition is absent and in the case of VM and TAM, the inverting-type input is not used. 2.2. Non-Ideality Analysis Considering non-idealities of DDTA, (1) can be rewritten as Vw=βj1Vy1−βj2Vy2+βj3Vy3 Io=GmsetnjVw(16) where βj1= 1 −εj1v and εj1v(εj1v 1) denote the voltage tracking error from Vy1 to Vw of j -th DDTA, βj2= 1 −εj2v and εj2v(εj2v 1) denote the voltage tracking error from Vy2 to Vw of j -th DDTA and βj3= 1 −εj3v and εj3v(εj3v 1) denote the voltage tracking error from Vy2to Vwof j-th DDTA. The non-ideal transconductance gain Gmsetnj is given by Gmsetnj(s)= ωgmj s+ωgmj !Gmsetj (17) Sensors 2022,22, 3535 16 of 21 Sensors 2022, 22, x FOR PEER REVIEW 15 of 21 The VM filter was used to test its temperature performance. The simulated magnitude frequency responses of the LP, BP, HP, BS, and AP filter when the temperature was varied from −10 to 70 °C are shown in Figure 14 . The proposed filter was also investigated using a Monte Carlo analysis by assuming that the fluctuation of the natural frequency changes caused by deviation of the capacitors and the threshold voltage of the MOS transistor. The BP response of the VM filter was simulated by setting 5% tolerances of the capacitors C1 and C2 and 5% variations of the transistor threshold voltage at 1.04 kHz, Q ≅ 1, and 200 Gaussian distribution runs. Figure 15 shows the derived histogram of the natural frequency which expressed that the standard deviation (σ) of fo was 33.339 Hz and the maximal and minimal values of fo were 1.132 kHz and 0.967 kHz, respectively. -60 -50 -40 -30 -20 -10 0 10 Magnitude, dB 1.0 10 100 1.0k 10k 100k 1.0M Frequency, Hz Temp. = -10 to 70 ºC Figure 14. The simulated magnitude frequency responses of the universal filter with temperature variation. Frequency [kHz] 0.950 0.975 1.000 1.025 1.050 1.075 1.100 1.125 1.150 0 5 10 15 20 25 30 n samples = 200 n divisions = 10 mean = 1039.89 sigma = 33.3392 minimum = 967.449 10th % = 998.841 median = 1037.94 90th % = 1084.83 maximum = 1132.88 Percent of Samples Figure 15. The histogram of the cutoff frequency of the universal filter with 200 runs of MC analysis. Figure 15. The histogram of the cutoff frequency of the universal filter with 200 runs of MC analysis. 3.2. Experimental Results The proposed mixed-mode universal filter was also tested experimentally to confirm its functionality. The simulation results based on the macro model and the measured results are included for comparison. The DDTA was realized using OTAs as shown in Figure 16 [ 52 ]. The prototype circuit was realized using commercially available integrated circuit LM13700N that consists of two current-controlled transconductance amplifiers. Note the benefit of the MI-MOST on the TA-based DDA in Figure 2in simplifying the CMOS structure and reducing the number of ICs needed to build the filter application. For instance, to create the multiple input (y 1 , y 2 , and y 3 ) of the DDA in Figure 16, two transconductance amplifiers (OTA 1 , OTA 2 ) are needed and another two OTAs are needed to construct the TA, hence two LM13700Ns are needed for each DDTA. Sensors 2022, 22, x FOR PEER REVIEW 16 of 21 3.2. Experimental Results The proposed mixed-mode universal filter was also tested experimentally to confirm its functionality. The simulation results based on the macro model and the measured results are included for comparison. The DDTA was realized using OTAs as shown in Figure 16 [52]. The prototype circuit was realized using commercially available integrated circuit LM13700N that consists of two current-controlled transconductance amplifiers. Note the benefit of the MI-MOST on the TA-based DDA in Figure 2 in simplifying the CMOS structure and reducing the number of ICs needed to build the filter application. For instance, to create the multiple input (y1, y2, and y3) of the DDA in Figure 16, two transconductance amplifiers (OTA1, OTA2) are needed and another two OTAs are needed to construct the TA, hence two LM13700Ns are needed for each DDTA. OTA1 OTA2 y1gmo DDA y2 y3 w gm TA o Figure 16. OTA-based DDTA [52]. For measurement setup, the supply voltage was ±5 V and the capacitances C1 and C2 were 220 nF. The Agilent Technology DSOX 1102G oscilloscope was used for supplying the sinusoidal input signal and measuring the output waveforms. The transconductances 𝑔𝑚1 = 𝑔𝑚2 = 𝑔𝑚3 = 𝑔𝑚4 = 𝑔𝑚5 = 1.51 mS were designed to obtain the mixed-mode filter with the natural frequency of 1.09 kHz and the quality factor of 1 (𝑄 ≅ 1). Figures 17a, 18a, 19a and 20a show the experimental frequency responses of the LP, HP, BP, and BS responses of the VM, CM, TAM, and TIM filters, respectively. Figures 17b, 18b, 19b and 20b show the experimental frequency response of magnitude and phase characteristics of the AP responses of the VM, CM, TAM, and TIM filters, respectively. To measure the frequency responses of TAM filter, a resistor was used to convert the output current to voltage, and the voltage according to this resistance was calculated to the output current for plotting. In case of CM and TIM filters, the high resistances (i.e., 𝑅𝑖𝑛 ≫ 662 Ω) were used to convert the input voltage to the input current at input terminals and convert the output current to the output voltage output terminals. The voltage according to the resistances was calculated as currents for plotting. Figure 16. OTA-based DDTA [52]. For measurement setup, the supply voltage was ± 5 V and the capacitances C 1 and C 2 were 220 nF. The Agilent Technology DSOX 1102G oscilloscope was used for supplying the sinusoidal input signal and measuring the output waveforms. The transconductances gm1=gm2=gm3=gm4=gm5= 1.51 mS were designed to obtain the mixed-mode filter with the natural frequency of 1.09 kHz and the quality factor of 1 ( Q∼ = 1). Figures 17a, 18a, 19a and 20a show the experimental frequency responses of the LP, HP, BP, and BS responses of the VM, CM, TAM, and TIM filters, respectively. Figures 17b, 18b, 19b and 20b show the experimental frequency response of magnitude and phase characteristics of the AP responses of the Sensors 2022,22, 3535 17 of 21 VM, CM, TAM, and TIM filters, respectively. To measure the frequency responses of TAM filter, a resistor was used to convert the output current to voltage, and the voltage according to this resistance was calculated to the output current for plotting. In case of CM and TIM filters, the high resistances (i.e., Rin  662 Ω ) were used to convert the input voltage to the input current at input terminals and convert the output current to the output voltage output terminals. The voltage according to the resistances was calculated as currents for plotting. Sensors 2022, 22, x FOR PEER REVIEW 17 of 21 (a) (b) Figure 17. Experimental frequency responses of the VM filter: (a) LP, BP, HP, BS filters; (b) AP filter. (a) (b) Figure 18. Experimental frequency responses of the CM filter: (a) LP, BP, HP, BS filters; (b) AP filter. -60 -50 -40 -30 -20 -10 0 10 1 100 10000 1000000 Magnitude [dB] Frequency [Hz] LP (Exp) LP (Sim) HP (Exp) HP (Sim) BP (Exp) BP (Sim) BS (Exp) BS (Sim) -240 -180 -120 -60 0 60 120 180 240 -40 -30 -20 -10 0 10 20 30 40 1 100 10000 1000000 Phase [º] Magnitude [dB] Frequency [Hz] Magnitude (Exp) Magnitude (Sim) Phase (Exp) Phase (Sim) -60 -50 -40 -30 -20 -10 0 10 1 10 100 1000 10000 100000 1000000 Magnitude [dB] Frequency [Hz] LP [Exp] LP [Sim] HP [Exp] HP [Sim] BP [Exp] BP [Sim] BS [Exp] BS [Sim] -240 -180 -120 -60 0 60 120 180 240 -40 -30 -20 -10 0 10 20 30 40 1 100 10000 1000000 Phase [] Magnitude [dB] Frequency [Hz] Magnitude [Exp] Magnitude [Sim] Phase [Exp] Phase [Sim] Figure 17. Experimental frequency responses of the VM filter: (a) LP, BP, HP, BS filters; (b) AP filter. Sensors 2022, 22, x FOR PEER REVIEW 17 of 21 (a) (b) Figure 17. Experimental frequency responses of the VM filter: (a) LP, BP, HP, BS filters; (b) AP filter. (a) (b) Figure 18. Experimental frequency responses of the CM filter: (a) LP, BP, HP, BS filters; (b) AP filter. -60 -50 -40 -30 -20 -10 0 10 1 100 10000 1000000 Magnitude [dB] Frequency [Hz] LP (Exp) LP (Sim) HP (Exp) HP (Sim) BP (Exp) BP (Sim) BS (Exp) BS (Sim) -240 -180 -120 -60 0 60 120 180 240 -40 -30 -20 -10 0 10 20 30 40 1 100 10000 1000000 Phase [º] Magnitude [dB] Frequency [Hz] Magnitude (Exp) Magnitude (Sim) Phase (Exp) Phase (Sim) -60 -50 -40 -30 -20 -10 0 10 1 10 100 1000 10000 100000 1000000 Magnitude [dB] Frequency [Hz] LP [Exp] LP [Sim] HP [Exp] HP [Sim] BP [Exp] BP [Sim] BS [Exp] BS [Sim] -240 -180 -120 -60 0 60 120 180 240 -40 -30 -20 -10 0 10 20 30 40 1 100 10000 1000000 Phase [] Magnitude [dB] Frequency [Hz] Magnitude [Exp] Magnitude [Sim] Phase [Exp] Phase [Sim] Figure 18. Experimental frequency responses of the CM filter: (a) LP, BP, HP, BS filters; (b) AP filter. The experimental frequency responses of the BP response of the VM filter with different transconductances ( gm = 0.48 mS, 0.87 mS, 1.51 mS, and 2.93 mS) are shown in Figure 21. This result was used to confirm that the proposed mixed-mode filter provides an electronic tuning ability without drubbing the quality factor. The Experimental setup of the universal filter is shown in Figure S1 in the Supplementary Materials. Sensors 2022,22, 3535 18 of 21 Sensors 2022, 22, x FOR PEER REVIEW 18 of 21 (a) (b) Figure 19. Experimental frequency responses of the TAM filter: (a) LP, BP, HP, BS filters; (b) AP filter. (a) (b) Figure 20. Experimental frequency responses of the TIM filter: (a) LP, BP, HP, BS filters; (b) AP filter. The experimental frequency responses of the BP response of the VM filter with different transconductances (𝑔𝑚 = 0.48 mS, 0.87 mS, 1.51 mS, and 2.93 mS) are shown in Figure 21. This result was used to confirm that the proposed mixed-mode filter provides an electronic tuning ability without drubbing the quality factor. The Experimental setup of the universal filter is shown in Figure S1 in the Supplementary Materials. -120 -110 -100 -90 -80 -70 -60 -50 1 100 10000 1000000 Magnitude [dB] Frequency [Hz] LP (Exp) LP (Sim) HP (Exp) HP (Sim) BP (Exp) BP (Sim) BS (Exp) BS (Sim) -240 -180 -120 -60 0 60 120 180 240 -100 -90 -80 -70 -60 -50 -40 -30 -20 1 100 10000 1000000 Phase [º] Magnitude [dB] Frequency [Hz] Magnitude [Exp] Magnitude [Sim] Phase [Exp] Phase [Sim] 0 10 20 30 40 50 60 70 1 10 100 1000 10000 100000 1000000 Frequency [Hz] Frequency [Hz] LP [Exp] LP [Sim] HP [Exp] HP [Sim] BP [Exp] BP [Sim] BS [Exp] BS [Sim] -240 -180 -120 -60 0 60 120 180 240 20 30 40 50 60 70 80 90 1 100 10000 1000000 Phase [º] Magnitude [dB] Frequency [Hz] Magnitude [Exp] Magnitude [Sim] Phase [Exp] Phase [Sim] Figure 19. Experimental frequency responses of the TAM filter: ( a ) LP, BP, HP, BS filters; ( b ) AP filter. Sensors 2022, 22, x FOR PEER REVIEW 18 of 21 (a) (b) Figure 19. Experimental frequency responses of the TAM filter: (a) LP, BP, HP, BS filters; (b) AP filter. (a) (b) Figure 20. Experimental frequency responses of the TIM filter: (a) LP, BP, HP, BS filters; (b) AP filter. The experimental frequency responses of the BP response of the VM filter with different transconductances (𝑔𝑚 = 0.48 mS, 0.87 mS, 1.51 mS, and 2.93 mS) are shown in Figure 21. This result was used to confirm that the proposed mixed-mode filter provides an electronic tuning ability without drubbing the quality factor. The Experimental setup of the universal filter is shown in Figure S1 in the Supplementary Materials. -120 -110 -100 -90 -80 -70 -60 -50 1 100 10000 1000000 Magnitude [dB] Frequency [Hz] LP (Exp) LP (Sim) HP (Exp) HP (Sim) BP (Exp) BP (Sim) BS (Exp) BS (Sim) -240 -180 -120 -60 0 60 120 180 240 -100 -90 -80 -70 -60 -50 -40 -30 -20 1 100 10000 1000000 Phase [º] Magnitude [dB] Frequency [Hz] Magnitude [Exp] Magnitude [Sim] Phase [Exp] Phase [Sim] 0 10 20 30 40 50 60 70 1 10 100 1000 10000 100000 1000000 Frequency [Hz] Frequency [Hz] LP [Exp] LP [Sim] HP [Exp] HP [Sim] BP [Exp] BP [Sim] BS [Exp] BS [Sim] -240 -180 -120 -60 0 60 120 180 240 20 30 40 50 60 70 80 90 1 100 10000 1000000 Phase [º] Magnitude [dB] Frequency [Hz] Magnitude [Exp] Magnitude [Sim] Phase [Exp] Phase [Sim] Figure 20. Experimental frequency responses of the TIM filter: ( a ) LP, BP, HP, BS filters; ( b ) AP filter. Sensors 2022, 22, x FOR PEER REVIEW 19 of 21 Figure 21. The experimental frequency responses of the BP response of the VM filter with different transconductances. 4. Conclusions A new mixed-mode universal filter using five DDTAs and two grounded capacitors was shown in this paper. The proposed filter offers 36 filtering responses into a single topology using the DDTA-based circuit. The natural frequency and the quality factor can be set orthogonally and electronically controlled. The performance of the proposed filter was evaluated in PSPICE simulation using the TSMC 0.18 µm CMOS technology and investigated by experiment tests using LM13600 discrete component integrated circuit as DDTAs. The simulation results were in agreement with the experimental results. Supplementary Materials: The following supporting information can be downloaded at: www.mdpi.com/xxx/s1, Figure S1: Experimental setup of the universal filter. Author Contributions: Conceptualization, F.K. and M.K.; methodology, M.K. and T.K.; software, M.K. and P.S.; expermentation, F.K.; validation, F.K., P.S. and M.K.; formal analysis, M.K. and T.K.; investigation, F.K., M.K. and T.K.; writing—original draft preparation, M.K. and F.K.; writing—review and editing, M.K., F.K. and T.K. All authors have read and agreed to the published version of the manuscript. Funding: This work was supported by King Mongkut’s Institute of Technology Ladkrabang under Grant KREF026201, and by the University of Defence Brno within the Organization Development Project VAROPS. Conflicts of Interest: The authors declare no conflict of interest. References 1. Wang, S.-F.; Chen, H.-P.; Ku, Y.; Le, C.-L. Versatile voltage-modde biquadratic filter and quadrature oscillator using four OTAs and two grounded capacitors. Electronics 2020, 9, 1493. 2. Alexander, C.K.; Sadiku, M.N.O. Fundamentals of Electric Circuits, 6th ed.; McGraw-Hill: New York, NY, USA, 2017; pp. 658–660. 3. Li, Y. A modified CDTA (MCDTA) and its applications: Designing Current-Mode Sixth-Order Elliptic Band-Pass Filter. Circuits Syst. Signal Process. 2011, 30, 1383–1390. 4. MAX260 Maxim Integrated. Available online: https://www.maximintegrated.com/en/products/analog/analog-filters/MAX260.html (accessed on 5 January 2022). 5. Psychalinos, C.; Kasimis, C.; Khateb, F. Multiple-input single-output universal biquad filter using single output operational transconductance amplifiers. Int. J. Electron. Commun. 2018, 93, 360–367. 6. Wang, S.-F.; Chen, H.-P.; Ku, Y.; Yang, C.-M. Independently tunable voltage-mode OTA-C biquadratic filter with five inputs and three outputs and its fully-uncoupled quadrature sinusoidal oscillator application. AEU Int. J. Electron. Commun. 2019, 110, 152822. -60 -50 -40 -30 -20 -10 0 10 1 10 100 1000 10000 100000 1000000 Magnitude [dB] Frequency [Hz] gm=0.48mS (Exp) gm=0.48mS (Sim) gm=0.87mS (Exp) gm=0.87mS (Sim) gm=1.51mS (Exp) gm=1.51mS (Sim) gm=2.93mS (Exp) gm=2.93mS (Sim) Figure 21. The experimental frequency responses of the BP response of the VM filter with different transconductances. Sensors 2022,22, 3535 19 of 21 4. Conclusions A new mixed-mode universal filter using five DDTAs and two grounded capacitors was shown in this paper. The proposed filter offers 36 filtering responses into a single topology using the DDTA-based circuit. The natural frequency and the quality factor can be set orthogonally and electronically controlled. The performance of the proposed filter was evaluated in PSPICE simulation using the TSMC 0.18 µ m CMOS technology and investigated by experiment tests using LM13600 discrete component integrated circuit as DDTAs. The simulation results were in agreement with the experimental results. Supplementary Materials: The following supporting information can be downloaded at: https:// www.mdpi.com/article/10.3390/s22093535/s1, Figure S1: Experimental setup of the universal filter. Author Contributions: Conceptualization, F.K. and M.K.; methodology, M.K. and T.K.; software, M.K. and P.S.; expermentation, F.K.; validation, F.K., P.S. and M.K.; formal analysis, M.K. and T.K.; investigation, F.K., M.K. and T.K.; writing—original draft preparation, M.K. and F.K.; writing—review and editing, M.K., F.K. and T.K. All authors have read and agreed to the published version of the manuscript. Funding: This work was supported by King Mongkut’s Institute of Technology Ladkrabang under Grant KREF026201, and by the University of Defence Brno within the Organization Development Project VAROPS. Conflicts of Interest: The authors declare no conflict of interest. References 1. Wang, S.-F.; Chen, H.-P.; Ku, Y.; Le, C.-L. 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